RE: [PATCH 2/2] usb: dwc3: Add workaround for host mode VBUS glitch when boot

From: Ran Wang
Date: Fri Feb 15 2019 - 03:39:26 EST


Hi Felipe,

Sorry for the late response, I didn't receive your mail.

Felipe Balbi <balbi@xxxxxxxxxx> wrotes:
>Hi,
>
>Ran Wang <ran.wang_1@xxxxxxx> writes:
>> +static void dwc3_power_off_all_roothub_ports(struct dwc3 *dwc)
>> +{
>> + int i, port_num;
>> + u32 reg, op_regs_base, offset;
>> + void __iomem *xhci_regs;
>> +
>> + /* xhci regs is not mapped yet, do it temperary here */
>> + if (dwc->xhci_resources[0].start) {
>> + xhci_regs = ioremap(dwc->xhci_resources[0].start,
>> + DWC3_XHCI_REGS_END);
>> + if (IS_ERR(xhci_regs)) {
>> + dev_err(dwc->dev, "Failed to ioremap xhci_regs\n");
>> + return;
>> + }
>> +
>> + op_regs_base = HC_LENGTH(readl(xhci_regs));
>> + reg = readl(xhci_regs + XHCI_HCSPARAMS1);
>> + port_num = HCS_MAX_PORTS(reg);
>> +
>> + for (i = 1; i <= port_num; i++) {
>> + offset = op_regs_base + XHCI_PORTSC_BASE + 0x10*(i-1);
>> + reg = readl(xhci_regs + offset);
>> + reg &= ~PORT_POWER;
>> + writel(reg, xhci_regs + offset);
>> + }
>> +
>> + iounmap(xhci_regs);
>
>why can't this be done during xhci_gen_setup()?

Actually I have done experiment like what you suggested (in xhci-plat.c), but the timing
seems too late--making VBUS waveform look like a square wave as below:

Here DWC3 enable host mode, VBUS on
|
+5V /---------\ 40ms /---------------------------....
0V ________/ 90ms \______/
| |
| Here do xhci reset, VBUS back to +5V again
Here set all PORTSC[PP] to 0 in xhci_gen_setup()

So I am afraid the solution might have to be added in DWC3 core driver where just after host mode enabling code if want fix this :(

Regards,
Ran