Re: [PATCH] ASoC: fsl_spdif: fix sysclk_df type

[Nicolin Chen]

On Mon, Feb 18, 2019 at 03:25:00PM +0000, Viorel Suman wrote:
> According to RM SPDIF STC SYSCLK_DF field is 9-bit wide, values
> being in 0..511 range. Use a proper type to handle sysclk_df.
> 
> Signed-off-by: Viorel Suman <viorel.suman@xxxxxxx>

Acked-by: Nicolin Chen <nicoleotsuka@xxxxxxxxx>

> ---
>  sound/soc/fsl/fsl_spdif.c | 10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c
> index a26686e..4842e6d 100644
> --- a/sound/soc/fsl/fsl_spdif.c
> +++ b/sound/soc/fsl/fsl_spdif.c
> @@ -96,7 +96,7 @@ struct fsl_spdif_priv {
>  	bool dpll_locked;
>  	u32 txrate[SPDIF_TXRATE_MAX];
>  	u8 txclk_df[SPDIF_TXRATE_MAX];
> -	u8 sysclk_df[SPDIF_TXRATE_MAX];
> +	u16 sysclk_df[SPDIF_TXRATE_MAX];
>  	u8 txclk_src[SPDIF_TXRATE_MAX];
>  	u8 rxclk_src;
>  	struct clk *txclk[SPDIF_TXRATE_MAX];
> @@ -376,7 +376,8 @@ static int spdif_set_sample_rate(struct snd_pcm_substream *substream,
>  	struct platform_device *pdev = spdif_priv->pdev;
>  	unsigned long csfs = 0;
>  	u32 stc, mask, rate;
> -	u8 clk, txclk_df, sysclk_df;
> +	u16 sysclk_df;
> +	u8 clk, txclk_df;
>  	int ret;
>  
>  	switch (sample_rate) {
> @@ -1109,8 +1110,9 @@ static u32 fsl_spdif_txclk_caldiv(struct fsl_spdif_priv *spdif_priv,
>  	static const u32 rate[] = { 32000, 44100, 48000, 96000, 192000 };
>  	bool is_sysclk = clk_is_match(clk, spdif_priv->sysclk);
>  	u64 rate_ideal, rate_actual, sub;
> -	u32 sysclk_dfmin, sysclk_dfmax;
> -	u32 txclk_df, sysclk_df, arate;
> +	u32 arate;
> +	u16 sysclk_dfmin, sysclk_dfmax, sysclk_df;
> +	u8 txclk_df;
>  
>  	/* The sysclk has an extra divisor [2, 512] */
>  	sysclk_dfmin = is_sysclk ? 2 : 1;
> -- 
> 2.7.4
>