Re: [RESEND] clk: imx: Refactor entire sccg pll clk

[Stephen Boyd]

Quoting Abel Vesa (2019-02-18 01:24:33)
> Make the entire combination of plls to be one single clock. The parents used
> for bypasses are specified each as an index in the parents list.
> The determine_rate does a lookup throughout all the possible combinations
> for all the divs and returns the best possible 'setup' which in turn is used
> by set_rate later to set up all the divs and bypasses.
> 
> Signed-off-by: Abel Vesa <abel.vesa@xxxxxxx>
> Tested-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
> Acked-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
> ---

Applied to clk-next