[PATCH 1/2] dt-bindings: misc: aspeed-p2a-ctrl: add support
From: Patrick Venture
Date: Thu Feb 21 2019 - 17:25:32 EST
Document the ast2400, ast2500 PCI-to-AHB bridge control driver bindings.
Signed-off-by: Patrick Venture <venture@xxxxxxxxxx>
---
.../bindings/misc/aspeed-p2a-ctrl.txt | 33 +++++++++++++++++++
1 file changed, 33 insertions(+)
create mode 100644 Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
diff --git a/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
new file mode 100644
index 000000000000..9c4d036ad5f5
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
@@ -0,0 +1,33 @@
+======================================================================
+Device tree bindings for Aspeed AST2400/AST2500 PCI-to-AHB Bridge Control Driver
+======================================================================
+
+The bridge is available on platforms with the VGA enabled on the Aspeed device.
+In this case, the host has access to a 64KiB window into all of the BMC's
+memory. The BMC can disable this bridge. If the bridge is enabled, the host
+has read access to all the regions of memory, however the host only has read
+and write access depending on a register controlled by the BMC.
+
+Required properties:
+===================
+
+ - compatible: must be one of:
+ - "aspeed,ast2400-p2a-ctrl"
+ - "aspeed,ast2500-p2a-ctrl"
+
+ - reg: physical address of SCU2C followed by SCU180
+
+Optional properties:
+===================
+
+- memory-region: A phandle to a reserved_memory region to be used for the PCI
+ to AHB mapping
+
+Example:
+
+p2a: p2a-control@1e6e2000 {
+ compatible = "aspeed,ast2400-p2a-ctrl";
+ reg = <0x1e6e202C 4
+ 0x1e6e2180 4>;
+ memory-region = <&reserved_memory>;
+};
--
2.21.0.rc0.258.g878e2cd30e-goog