Re: [PATCH v3 2/3] drm/v3d: Don't try to set OVRTMUOUT on V3D 4.x.

[Dave Emett]

On Wed, 20 Feb 2019 at 23:37, Eric Anholt <eric@xxxxxxxxxx> wrote:
>
> The old field is gone and the register now has a different field,
> QRMAXCNT for how many TMU requests get serviced before thread switch.
> We were accidentally reducing it from its default of 0x3 (4 requests)
> to 0x0 (1).
>
> v2: Skip setting the reg at all on 4.x, instead of trying to update
>     only the old field.
>
> Signed-off-by: Eric Anholt <eric@xxxxxxxxxx>

Reviewed-by: Dave Emett <david.emett@xxxxxxxxxxxx>


> ---
>  drivers/gpu/drm/v3d/v3d_gem.c  | 3 ++-
>  drivers/gpu/drm/v3d/v3d_regs.h | 2 ++
>  2 files changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/v3d/v3d_gem.c b/drivers/gpu/drm/v3d/v3d_gem.c
> index 109be31e47ea..449d01ea54a0 100644
> --- a/drivers/gpu/drm/v3d/v3d_gem.c
> +++ b/drivers/gpu/drm/v3d/v3d_gem.c
> @@ -25,7 +25,8 @@ v3d_init_core(struct v3d_dev *v3d, int core)
>          * type.  If you want the default behavior, you can still put
>          * "2" in the indirect texture state's output_type field.
>          */
> -       V3D_CORE_WRITE(core, V3D_CTL_MISCCFG, V3D_MISCCFG_OVRTMUOUT);
> +       if (v3d->ver < 40)
> +               V3D_CORE_WRITE(core, V3D_CTL_MISCCFG, V3D_MISCCFG_OVRTMUOUT);
>
>         /* Whenever we flush the L2T cache, we always want to flush
>          * the whole thing.
> diff --git a/drivers/gpu/drm/v3d/v3d_regs.h b/drivers/gpu/drm/v3d/v3d_regs.h
> index 6ccdee9d47bd..8e88af237610 100644
> --- a/drivers/gpu/drm/v3d/v3d_regs.h
> +++ b/drivers/gpu/drm/v3d/v3d_regs.h
> @@ -216,6 +216,8 @@
>  # define V3D_IDENT2_BCG_INT                            BIT(28)
>
>  #define V3D_CTL_MISCCFG                                0x00018
> +# define V3D_CTL_MISCCFG_QRMAXCNT_MASK                 V3D_MASK(3, 1)
> +# define V3D_CTL_MISCCFG_QRMAXCNT_SHIFT                1
>  # define V3D_MISCCFG_OVRTMUOUT                         BIT(0)
>
>  #define V3D_CTL_L2CACTL                                0x00020
> --
> 2.20.1
>