Hi Eric,
Am Sonntag, den 10.03.2019, 16:18 -0700 schrieb Eric Nelson:
The pll4_audio_div attempted to reflect one bit of a two-bit
divisor (AUDIO_DIV_LSB) in the CCM_ANALOG_MISC2 register.
Unfortunately, this divisor is non-functional at least on the
latest silicon revisions and has been removed from the reference
manual.
This is discussed in this NXP Community thread:
ÂÂÂÂhttps://community.nxp.com/thread/462806
Remove the definition of pll4_audio_div to reflect this and
reparent the ssi, cko1, and ESAI/ASRC/SPDIF clocks to the
pll4_post_div clock.
Signed-off-by: Eric Nelson <eric@xxxxxxxxxx>---
Âdrivers/clk/imx/clk-imx6q.cÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ|ÂÂÂ7 +-
Âinclude/dt-bindings/clock/imx6qdl-clock.h | 127 +++++++++++++++---------------
Â2 files changed, 66 insertions(+), 68 deletions(-)
diff --git a/include/dt-bindings/clock/imx6qdl-clock.h b/include/dt-bindings/clock/imx6qdl-clock.h
index b3cef29..dea23a9 100644
--- a/include/dt-bindings/clock/imx6qdl-clock.h
+++ b/include/dt-bindings/clock/imx6qdl-clock.h
@@ -213,69 +213,68 @@
Â#define IMX6QDL_CLK_CKO2 200
Â#define IMX6QDL_CLK_CKO 201
Â#define IMX6QDL_CLK_VDOA 202
-#define IMX6QDL_CLK_PLL4_AUDIO_DIV 203
-#define IMX6QDL_CLK_LVDS1_SEL 204
+#define IMX6QDL_CLK_LVDS1_SEL 203
+#define IMX6QDL_CLK_LVDS2_SEL 204
+#define IMX6QDL_CLK_LVDS1_GATE 205
You can not renumber the DT clock defines, as this breaks DT backward
compatibility. You can however remove IMX6QDL_CLK_PLL4_AUDIO_DIV and
leave a hole in the numbers, maybe with a comment about why it exists.