Re: [PATCH] irqchip/gic: fix passing wrong start irq number to irq_alloc_descs() for secondary GICs

[Marc Zyngier]

On 11/03/2019 14:52, Liu Xiang wrote:
> For secondary GICs, the start irq number should skip over SGIs
> and PPIs. Its value should be 32. So we should pass hwirq_base to 
> irq_alloc_descs() rather than a constant number 16.
> 
> Signed-off-by: Liu Xiang <liu.xiang6@xxxxxxxxxx>
> ---
>  drivers/irqchip/irq-gic.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
> index ba2a37a..351f576 100644
> --- a/drivers/irqchip/irq-gic.c
> +++ b/drivers/irqchip/irq-gic.c
> @@ -1157,7 +1157,7 @@ static int gic_init_bases(struct gic_chip_data *gic, int irq_start,
>  
>  		gic_irqs -= hwirq_base; /* calculate # of irqs to allocate */
>  
> -		irq_base = irq_alloc_descs(irq_start, 16, gic_irqs,
> +		irq_base = irq_alloc_descs(irq_start, hwirq_base, gic_irqs,
>  					   numa_node_id());
>  		if (irq_base < 0) {
>  			WARN(1, "Cannot allocate irq_descs @ IRQ%d, assuming pre-allocated\n",
> 

I suggest you look at __irq_alloc_descs(), and understand what the 
various parameters mean. What you're doing here has absolutely no 
effect.

The right thing to do would be to get rid of this altogether, except 
that we have exactly *one* platform in the tree that is still non-DT 
(some unmaintained Cavium piece of junk). But we can still simplify it, 
as this guy doesn't have a secondary GIC (it is braindead enough).

What I'm suggesting instead is: