Re: [PATCH 4/4] MIPS: Loongson32: dts: add ls1b & ls1c

[Jiaxun Yang]

Hi Rob,

Thanks for your reply, I have some questions on that:

å 2019/3/12 äå8:28, Rob Herring åé:
> On Tue, Mar 12, 2019 at 4:16 AM Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx> wrote:
> > Add devicetree skeleton for ls1b and ls1c
> >
> > Signed-off-by: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
> > ---
> >
> > +/ {
> > +       model = "Loongson LS1B";
> > +       compatible = "loongson,ls1b";
> Documented?
Should I document the vendor string or whole

"loongson,ls1b"?

> > +
> > +};
> > +
> > +&ehci0 {
> > +       status = "okay";
> > +};
> > +
> > +&ohci0 {
> > +       status = "okay";
> > +};
> > \ No newline at end of file
> Fix this.
>
> > diff --git a/arch/mips/boot/dts/loongson/ls1c.dts b/arch/mips/boot/dts/loongson/ls1c.dts
> > new file mode 100644
> > index 000000000000..778d205a586e
> > --- /dev/null
> > +++ b/arch/mips/boot/dts/loongson/ls1c.dts
> > @@ -0,0 +1,25 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (c) 2019 Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
> > + */
> > +
> > +/dts-v1/;
> > +#include <ls1x.dtsi>
> > +
> > +/ {
> > +       model = "Loongson LS1C300A";
> > +       compatible = "loongson,ls1c300a";
> > +
> > +};
> > +
> > +&platintc4 {
> > +       status = "okay";
> > +};
> > +
> > +&ehci0 {
> > +       status = "okay";
> > +};
> > +
> > +&ohci0 {
> > +       status = "okay";
> > +};
> > \ No newline at end of file
> > diff --git a/arch/mips/boot/dts/loongson/ls1x.dtsi b/arch/mips/boot/dts/loongson/ls1x.dtsi
> > new file mode 100644
> > index 000000000000..f808e4328fd8
> > --- /dev/null
> > +++ b/arch/mips/boot/dts/loongson/ls1x.dtsi
> > @@ -0,0 +1,117 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (c) 2019 Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
> > + */
> > +
> > +/dts-v1/;
> > +#include <dt-bindings/interrupt-controller/irq.h>
> > +
> > +
> > +/ {
> > +    #address-cells = <1>;
> > +       #size-cells = <1>;
> > +
> > +       cpus {
> > +               #address-cells = <1>;
> > +               #size-cells = <0>;
> > +
> > +               cpu@0 {
> > +                       device_type = "cpu";
> > +                       reg = <0>;
> Needs a (documented) compatible string.
>
>
>
> > +               };
> > +
> > +               ehci0: usb@1fe20000 {
> > +                       compatible = "generic-ehci";
> It would be better to add a chip specific compatible here. Most all
> USB controllers have some quirks.
Should it be documented?
> > +                       reg = <0x1fe20000 0x100>;
> > +                       interrupt-parent = <&platintc1>;
> > +                       interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
> > +
> > +           status = "disabled";
> > +                       };
> > +
> > +               ohci0: usb@1fe28000 {
> > +                       compatible = "generic-ohci";
> > +                       reg = <0x1fe28000 0x100>;
> > +                       interrupt-parent = <&platintc1>;
> > +                       interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
> > +
> > +           status = "disabled";
> > +                       };
> Don't you need a serial port or something for a console?

serial port is currently added by legacy pdev code. I'm going to add it 
to devicetree after rework on clk driver being sent out.


Thanks.

--

Jiaxun Yang