Re: [PATCH 02/22] perf/x86/intel: Extract memory code PEBS parser for reuse

[Peter Zijlstra]

On Mon, Mar 18, 2019 at 02:41:24PM -0700, kan.liang@xxxxxxxxxxxxxxx wrote:
> @@ -1125,34 +1125,50 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
>  	return 0;
>  }
>  
> -static inline u64 intel_hsw_weight(struct pebs_record_skl *pebs)
> +static inline u64 intel_hsw_weight(u64 tsx_tuning)

That function name is now completely insane. It used to be a reference
to the hsw pebs format, but you just destroyed that.

>  {
> -	if (pebs->tsx_tuning) {
> -		union hsw_tsx_tuning tsx = { .value = pebs->tsx_tuning };
> +	if (tsx_tuning) {
> +		union hsw_tsx_tuning tsx = { .value = tsx_tuning };
>  		return tsx.cycles_last_block;
>  	}
>  	return 0;
>  }
>  
> -static inline u64 intel_hsw_transaction(struct pebs_record_skl *pebs)
> +static u64 intel_hsw_transaction(u64 tsx_tuning, u64 ax)

Guess what...

>  {
> -	u64 txn = (pebs->tsx_tuning & PEBS_HSW_TSX_FLAGS) >> 32;
> +	u64 txn = (tsx_tuning & PEBS_HSW_TSX_FLAGS) >> 32;
>  
>  	/* For RTM XABORTs also log the abort code from AX */
> -	if ((txn & PERF_TXN_TRANSACTION) && (pebs->ax & 1))
> -		txn |= ((pebs->ax >> 24) & 0xff) << PERF_TXN_ABORT_SHIFT;
> +	if ((txn & PERF_TXN_TRANSACTION) && (ax & 1))
> +		txn |= ((ax >> 24) & 0xff) << PERF_TXN_ABORT_SHIFT;
>  	return txn;
>  }