Re: [PATCH v4] arm64: dts: fsl: imx8mq: enable the multi sensor TMU

[Lucas Stach]

Am Donnerstag, den 21.03.2019, 05:52 -0700 schrieb Angus Ainslie (Purism):
> Add the imx8mq TMU (Thermal management unit) nodes for CPU,
> GPU, and VPU.
> 
> Signed-off-by: Angus Ainslie (Purism) <angus@xxxxxxxx>

Reviewed-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx>

> ---
> 
> Changes since v3:
> 
> Moved the annotation.
> 
> Changes since v2:
> 
> Updated alert and critical temps for commercial parts.
> Fixed node names.
> 
> Changes since v1:
> 
> Removed references to multi sensor patch.
> 
> Âarch/arm64/boot/dts/freescale/imx8mq.dtsi | 118 ++++++++++++++++++++++
> Â1 file changed, 118 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index b39c6c75c043..81d5ce1b1ec1 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -8,6 +8,7 @@
> Â#include <dt-bindings/power/imx8mq-power.h>
> Â#include <dt-bindings/gpio/gpio.h>
> Â#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/thermal/thermal.h>
> Â#include "imx8mq-pinfunc.h"
> Â
> Â/ {
> @@ -89,6 +90,7 @@
> > Â			reg = <0x0>;
> > Â			enable-method = "psci";
> > Â			next-level-cache = <&A53_L2>;
> > +			#cooling-cells = <2>;
> > Â		};
> Â
> > > Â		A53_1: cpu@1 {
> @@ -97,6 +99,7 @@
> > Â			reg = <0x1>;
> > Â			enable-method = "psci";
> > Â			next-level-cache = <&A53_L2>;
> > +			#cooling-cells = <2>;
> > Â		};
> Â
> > > Â		A53_2: cpu@2 {
> @@ -105,6 +108,7 @@
> > Â			reg = <0x2>;
> > Â			enable-method = "psci";
> > Â			next-level-cache = <&A53_L2>;
> > +			#cooling-cells = <2>;
> > Â		};
> Â
> > > Â		A53_3: cpu@3 {
> @@ -113,6 +117,7 @@
> > Â			reg = <0x3>;
> > Â			enable-method = "psci";
> > Â			next-level-cache = <&A53_L2>;
> > +			#cooling-cells = <2>;
> > Â		};
> Â
> > Â		A53_L2: l2-cache0 {
> @@ -210,6 +215,119 @@
> > Â				#interrupt-cells = <2>;
> > Â			};
> Â
> > > +			tmu: tmu@30260000 {
> > +				compatible = "fsl,imx8mq-tmu";
> > +				reg = <0x30260000 0x10000>;
> > +				interrupt = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
> > +				little-endian;
> > +				fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x70061>;
> > +				fsl,tmu-calibration = <0x00000000 0x00000023
> > +						ÂÂÂÂÂÂÂ0x00000001 0x00000029
> > +						ÂÂÂÂÂÂÂ0x00000002 0x0000002f
> > +						ÂÂÂÂÂÂÂ0x00000003 0x00000035
> > +						ÂÂÂÂÂÂÂ0x00000004 0x0000003d
> > +						ÂÂÂÂÂÂÂ0x00000005 0x00000043
> > +						ÂÂÂÂÂÂÂ0x00000006 0x0000004b
> > +						ÂÂÂÂÂÂÂ0x00000007 0x00000051
> > +						ÂÂÂÂÂÂÂ0x00000008 0x00000057
> > +						ÂÂÂÂÂÂÂ0x00000009 0x0000005f
> > +						ÂÂÂÂÂÂÂ0x0000000a 0x00000067
> > +						ÂÂÂÂÂÂÂ0x0000000b 0x0000006f
> +
> > +						ÂÂÂÂÂÂÂ0x00010000 0x0000001b
> > +						ÂÂÂÂÂÂÂ0x00010001 0x00000023
> > +						ÂÂÂÂÂÂÂ0x00010002 0x0000002b
> > +						ÂÂÂÂÂÂÂ0x00010003 0x00000033
> > +						ÂÂÂÂÂÂÂ0x00010004 0x0000003b
> > +						ÂÂÂÂÂÂÂ0x00010005 0x00000043
> > +						ÂÂÂÂÂÂÂ0x00010006 0x0000004b
> > +						ÂÂÂÂÂÂÂ0x00010007 0x00000055
> > +						ÂÂÂÂÂÂÂ0x00010008 0x0000005d
> > +						ÂÂÂÂÂÂÂ0x00010009 0x00000067
> > +						ÂÂÂÂÂÂÂ0x0001000a 0x00000070
> +
> > +						ÂÂÂÂÂÂÂ0x00020000 0x00000017
> > +						ÂÂÂÂÂÂÂ0x00020001 0x00000023
> > +						ÂÂÂÂÂÂÂ0x00020002 0x0000002d
> > +						ÂÂÂÂÂÂÂ0x00020003 0x00000037
> > +						ÂÂÂÂÂÂÂ0x00020004 0x00000041
> > +						ÂÂÂÂÂÂÂ0x00020005 0x0000004b
> > +						ÂÂÂÂÂÂÂ0x00020006 0x00000057
> > +						ÂÂÂÂÂÂÂ0x00020007 0x00000063
> > +						ÂÂÂÂÂÂÂ0x00020008 0x0000006f
> +
> > +						ÂÂÂÂÂÂÂ0x00030000 0x00000015
> > +						ÂÂÂÂÂÂÂ0x00030001 0x00000021
> > +						ÂÂÂÂÂÂÂ0x00030002 0x0000002d
> > +						ÂÂÂÂÂÂÂ0x00030003 0x00000039
> > +						ÂÂÂÂÂÂÂ0x00030004 0x00000045
> > +						ÂÂÂÂÂÂÂ0x00030005 0x00000053
> > +						ÂÂÂÂÂÂÂ0x00030006 0x0000005f
> > +						ÂÂÂÂÂÂÂ0x00030007 0x00000071>;
> > +				#thermal-sensor-cells =ÂÂ<1>;
> > +			};
> +
> > +			thermal-zones {
> > +				cpu-thermal {
> > +					polling-delay-passive = <250>;
> > +					polling-delay = <2000>;
> > +					thermal-sensors = <&tmu 0>;
> +
> > +					trips {
> > +						cpu_alert: cpu-alert {
> > +							temperature = <80000>;
> > +							hysteresis = <2000>;
> > +							type = "passive";
> > +						};
> +
> > +						cpu-crit {
> > +							temperature = <90000>;
> > +							hysteresis = <2000>;
> > +							type = "critical";
> > +						};
> > +					};
> +
> > +					cooling-maps {
> > +						map0 {
> > +							trip = <&cpu_alert>;
> > +							cooling-device =
> > +								<&A53_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > +								<&A53_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > +								<&A53_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
> > +								<&A53_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> > +						};
> > +					};
> > +				};
> +
> > +				gpu-thermal {
> > +					polling-delay-passive = <250>;
> > +					polling-delay = <2000>;
> > +					thermal-sensors = <&tmu 1>;
> +
> > +					trips {
> > +						gpu-crit {
> > +							temperature = <90000>;
> > +							hysteresis = <2000>;
> > +							type = "critical";
> > +						};
> > +					};
> > +				};
> +
> > +				vpu-thermal {
> > +					polling-delay-passive = <250>;
> > +					polling-delay = <2000>;
> > +					thermal-sensors = <&tmu 2>;
> +
> > +					trips {
> > +						vpu-crit {
> > +							temperature = <90000>;
> > +							hysteresis = <2000>;
> > +							type = "critical";
> > +						};
> > +					};
> > +				};
> > +			};
> +
> > > Â			wdog1: watchdog@30280000 {
> > Â				compatible = "fsl,imx8mq-wdt", "fsl,imx21-wdt";
> > Â				reg = <0x30280000 0x10000>;