Re: Issues with i.MX SPI DMA transfers

[Igor Plyatov]

Dear Uwe,

> On Thu, Mar 28, 2019 at 10:04:21AM +0300, Igor Plyatov wrote:
> > Dear Uwe,
> >
> >
> > > Hello Igor,
> > >
> > > On Wed, Mar 27, 2019 at 08:40:00PM +0300, Igor Plyatov wrote:
> > > > please, help to resolve two issues with SPI DMA transfers at i.MX6Q
> > > > platform.
> > > >
> > > > First issue is
> > > >   Â[ 4465.008003] spi_master spi0: I/O Error in DMA RX
> > > >
> > > > Second issue is duplication for one of received bytes.
> > > >
> > > > Probably, these issues related to each one.
> > > This is probably the same problem I hit some time ago. Check ERR009165
> > > in the errata. You either need to disable DMA or need a fixed
> > > sdma-Script.
> > disabling of DMA is not an option, because high throughput required for SPI
> > bus to communicate with DSPs.
> Is this a theoretical reasoning, or is that backed by testing? People
> here on the list already said things like:
>
> 	The eCSPI appears to insert a 4 bit pause after each word in DMA
> 	mode, not done in PIO mode, which can make DMA transfers 50%
> 	slower than PIO.
>
> You might want to read the thread
> https://marc.info/?l=linux-spi&m=155191201208766&w=2
> .

SPI throughput depends from transfer mode (PIO or DMA), OS load and OS 
version.

For example, Linux-4.9.87 has quite bad results for SPI throughput when 
PIO transfer used and OS highly loaded by other processes. Throughput 
varies from 2700 kbps to 0.8 kbps and this is totally unacceptable for 
my application, where streaming of DSP data required.

Linux-5.1.0-rc2 has much better performance of SPI with PIO transfers. 
Throughput varies within 10%.

> > I'm aware of ERR009165, but as I write some minutes earlier to list, spi0
> > (alias for ecspi1) and spi1 (alias for ecspi2) work flawless, while spi4
> > (alias for ecspi5) fails very fast.
> As the issue is a timing race, it might depend on things like length of
> the SPI lines, load on the data lines and other electrical properties.
> So you might just be happy that spi0 and spi1 don't show the issue for
> you. Or you didn't apply the "right" work load yet.

This e-mail thread discuss operation of SPI only in loopback mode. So, 
real lines of SPI does not used. SPI module of SOC has connected MOSI 
and MISO lines internally, while MISO disconnected from SOC pad. So, 
electrical characteristics of SPI lines are not important at all.

Best wishes.

--

Igor Plyatov