Re: [RFC PATCH v3 0/3] x86/perf/amd: AMD PMC counters and NMI latency

[Cyrill Gorcunov]

On Tue, Apr 02, 2019 at 10:53:38AM -0400, Vince Weaver wrote:
> On Tue, 2 Apr 2019, Cyrill Gorcunov wrote:
> > On Tue, Apr 02, 2019 at 03:03:02PM +0200, Peter Zijlstra wrote:
> > > I have vague memories of the P4 thing crashing with Vince's perf_fuzzer,
> > > but maybe I'm wrong.
> > 
> > No, you're correct. p4 was crashing many times before we manage to make
> > it more-less stable. The main problem though that to find working p4 box
> > is really a problem.
> 
> I do have some a functioning p4 system I can test on.
> I can easily run the fuzzer and report crashes, but I only have limited 
> time/skills to actually fix the problems it turns up.

You know, running fuzzer on p4 might worth in anycase. As to potential
problems to fix -- i could try find some time slot for, still quite
limited too 'cause of many other duties :(

> One nice thing is that as of Linux 5.0 *finally* the fuzzer can run 
> indefinitely on most modern Intel chips without crashing (still triggers a 
> few warnings).  So finally we have the ability to tell when a new crash is 
> a regression and potentially can bisect it.  Although obviously this 
> doesn't necessarily apply to the p4.
> 
> I do think the number of people trying to run perf on a p4 is probably 
> pretty small these days.

Quite agree. Moreover current p4 perf code doesn't cover all potential
functionality (for example cascaded counters) and nobody ever complained
about it, I think exactly because not that many p4 boxes left and putting
efforts into this perf module development doesn't look like a good investment,
better to stick with more modern cpus and deprecate p4 with small steps.