Re: [PATCH v2 2/2] dt-bindings: cpufreq: Document operating-points-v2-sunxi-cpu

[Maxime Ripard]

On Thu, Apr 11, 2019 at 01:49:39AM +0800, Frank Lee wrote:
> On Wed, Apr 10, 2019 at 10:57 PM Maxime Ripard
> <maxime.ripard@xxxxxxxxxxx> wrote:
> >
> > On Tue, Apr 09, 2019 at 01:25:58PM -0400, Yangtao Li wrote:
> > > Allwinner Process Voltage Scaling Tables defines the voltage and
> > > frequency value  based on the speedbin blown in the efuse combination.
> > > The sunxi-cpufreq-nvmem driver reads the efuse value from the SoC to
> > > provide the OPP framework with required information.
> > > This is used to determine the voltage and frequency value for each
> > > OPP of operating-points-v2 table when it is parsed by the OPP framework.
> > >
> > > The "operating-points-v2-sunxi-cpu" DT extends the "operating-points-v2"
> > > with following parameters:
> > > - nvmem-cells (NVMEM area containig the speedbin information)
> > > - opp-microvolt-<name>: voltage in micro Volts.
> > >   At runtime, the platform can pick a <name> and matching
> > >   opp-microvolt-<name> property
> > >
> > > Signed-off-by: Yangtao Li <tiny.windzz@xxxxxxxxx>
> > > ---
> > >  .../bindings/opp/sunxi-nvmem-cpufreq.txt      | 166 ++++++++++++++++++
> > >  1 file changed, 166 insertions(+)
> > >  create mode 100644 Documentation/devicetree/bindings/opp/sunxi-nvmem-cpufreq.txt
> > >
> > > diff --git a/Documentation/devicetree/bindings/opp/sunxi-nvmem-cpufreq.txt b/Documentation/devicetree/bindings/opp/sunxi-nvmem-cpufreq.txt
> > > new file mode 100644
> > > index 000000000000..c81a2075b974
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/opp/sunxi-nvmem-cpufreq.txt
> > > @@ -0,0 +1,166 @@
> > > +Allwinner Technologies, Inc. NVMEM CPUFreq and OPP bindings
> > > +===================================
> > > +
> > > +For some SoCs, the CPU frequency subset and voltage value of each OPP
> > > +varies based on the silicon variant in use. Allwinner Process Voltage
> > > +Scaling Tables defines the voltage and frequency value  based on the
> > > +speedbin blown in the efuse combination. The sunxi-cpufreq-nvmem driver
> > > +reads the efuse value from the SoC to provide the OPP framework with
> > > +required information.
> > > +
> > > +Required properties:
> > > +--------------------
> > > +In 'cpus' nodes:
> > > +- operating-points-v2: Phandle to the operating-points-v2 table to use.
> > > +
> > > +In 'operating-points-v2' table:
> > > +- compatible: Should be
> > > +     - 'operating-points-v2-sunxi-cpu'.
> >
> > Vendor-specific compatibles should have the vendor mentionned.
> >
> > Also, even though the H6 is the only SoC so far that has needed this,
> > we can't really assume that it will be the only SoC to use it, or that
> > it will always behave like that.
>
> There is no doubt that many platforms need this.

That many platform *may* need this, yeah, sure. We can probably even
share the same driver for them.

That all of those theretical platform will have the exact same
behaviour, down to how the data is stored in the nvmem, and how many
bins you have? I seriously doubt so.

> > So having something like allwinner,sun50i-h6-operating-points would be
> > great.
> allwinner,cpu-operating-points-v2 Maybe better?

No. You need to have the SoC name in there, and you can drop the
v2. There's never been a v1.

Maxime

--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

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