Re: [tip:perf/core] perf/x86/intel: Force resched when TFA sysctl is modified

[Peter Zijlstra]

On Tue, Apr 16, 2019 at 12:28:00PM -0400, Vince Weaver wrote:
> On Tue, 16 Apr 2019, tip-bot for Stephane Eranian wrote:
> 
> > Commit-ID:  f447e4eb3ad1e60d173ca997fcb2ef2a66f12574
> > Gitweb:     https://git.kernel.org/tip/f447e4eb3ad1e60d173ca997fcb2ef2a66f12574
> > Author:     Stephane Eranian <eranian@xxxxxxxxxx>
> > AuthorDate: Mon, 8 Apr 2019 10:32:52 -0700
> > Committer:  Ingo Molnar <mingo@xxxxxxxxxx>
> > CommitDate: Tue, 16 Apr 2019 12:19:35 +0200
> > 
> > perf/x86/intel: Force resched when TFA sysctl is modified
> 
> What's TFA?  Tuna-fish-alarm?  Nowhere in the commit or in the code does 
> it ever say what a TFA is or why we'd want to resched when it is modified.

See commit: 400816f60c54 ("perf/x86/intel: Implement support for TSX Force Abort")

Author: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx>
Date:   Tue Mar 5 22:23:18 2019 +0100

    perf/x86/intel: Implement support for TSX Force Abort
    
    Skylake (and later) will receive a microcode update to address a TSX
    errata. This microcode will, on execution of a TSX instruction
    (speculative or not) use (clobber) PMC3. This update will also provide
    a new MSR to change this behaviour along with a CPUID bit to enumerate
    the presence of this new MSR.
    
    When the MSR gets set; the microcode will no longer use PMC3 but will
    Force Abort every TSX transaction (upon executing COMMIT).
    
    When TSX Force Abort (TFA) is allowed (default); the MSR gets set when
    PMC3 gets scheduled and cleared when, after scheduling, PMC3 is
    unused.
    
    When TFA is not allowed; clear PMC3 from all constraints such that it
    will not get used.
    
    Signed-off-by: Peter Zijlstra (Intel) <peterz@xxxxxxxxxxxxx>
    Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>