[PATCH v1 2/2] drm/komeda: Adds limitation check for AFBC wide block not support Rot90

From: Lowry Li (Arm Technology China)
Date: Fri Apr 19 2019 - 14:24:23 EST


Komeda series hardware doesn't support Rot90 for AFBC wide block. So
add limitation check to reject it if such configuration has been posted.

Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@xxxxxxx>
---
drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c | 15 +++++++++++++++
.../gpu/drm/arm/display/komeda/komeda_format_caps.c | 7 ++++++-
.../gpu/drm/arm/display/komeda/komeda_format_caps.h | 8 +++++++-
.../gpu/drm/arm/display/komeda/komeda_framebuffer.c | 18 +++++++++---------
.../gpu/drm/arm/display/komeda/komeda_framebuffer.h | 5 +++--
.../gpu/drm/arm/display/komeda/komeda_pipeline_state.c | 8 +++++++-
drivers/gpu/drm/arm/display/komeda/komeda_plane.c | 2 +-
7 files changed, 48 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
index 34506ef..9603de9 100644
--- a/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
+++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_dev.c
@@ -494,11 +494,26 @@ static int d71_enum_resources(struct komeda_dev *mdev)
{__HW_ID(6, 7), 0/*DRM_FORMAT_YUV420_10BIT*/, 1, RICH, Rot_ALL_H_V, LYT_NM, AFB_TH},
};

+static bool d71_format_mod_supported(const struct komeda_format_caps *caps,
+ u32 layer_type, u64 modifier, u32 rot)
+{
+ uint64_t layout = modifier & AFBC_FORMAT_MOD_BLOCK_SIZE_MASK;
+
+ if ((layout == AFBC_FORMAT_MOD_BLOCK_SIZE_32x8) &&
+ drm_rotation_90_or_270(rot)) {
+ DRM_DEBUG_ATOMIC("D71 doesn't support ROT90 for WB-AFBC.\n");
+ return false;
+ }
+
+ return true;
+}
+
static void d71_init_fmt_tbl(struct komeda_dev *mdev)
{
struct komeda_format_caps_table *table = &mdev->fmt_tbl;

table->format_caps = d71_format_caps_table;
+ table->format_mod_supported = d71_format_mod_supported;
table->n_formats = ARRAY_SIZE(d71_format_caps_table);
}

diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c
index b219514..cd4d9f5 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c
@@ -74,7 +74,8 @@
};

bool komeda_format_mod_supported(struct komeda_format_caps_table *table,
- u32 layer_type, u32 fourcc, u64 modifier)
+ u32 layer_type, u32 fourcc, u64 modifier,
+ u32 rot)
{
const struct komeda_format_caps *caps;

@@ -85,6 +86,10 @@ bool komeda_format_mod_supported(struct komeda_format_caps_table *table,
if (!(caps->supported_layer_types & layer_type))
return false;

+ if (table->format_mod_supported)
+ return table->format_mod_supported(caps, layer_type, modifier,
+ rot);
+
return true;
}

diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h
index 96de22e..381e873 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h
@@ -71,10 +71,15 @@ struct komeda_format_caps {
*
* @n_formats: the size of format_caps list.
* @format_caps: format_caps list.
+ * @format_mod_supported: Optional. Some HW may have special requirements or
+ * limitations which can not be described by format_caps, this func supply HW
+ * the ability to do the further HW specific check.
*/
struct komeda_format_caps_table {
u32 n_formats;
const struct komeda_format_caps *format_caps;
+ bool (*format_mod_supported)(const struct komeda_format_caps *caps,
+ u32 layer_type, u64 modifier, u32 rot);
};

extern u64 komeda_supported_modifiers[];
@@ -100,6 +105,7 @@ u32 *komeda_get_layer_fourcc_list(struct komeda_format_caps_table *table,
void komeda_put_fourcc_list(u32 *fourcc_list);

bool komeda_format_mod_supported(struct komeda_format_caps_table *table,
- u32 layer_type, u32 fourcc, u64 modifier);
+ u32 layer_type, u32 fourcc, u64 modifier,
+ u32 rot);

#endif
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c
index f842c88..d5822a3 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c
@@ -239,20 +239,20 @@ struct drm_framebuffer *
}

/* if the fb can be supported by a specific layer */
-bool komeda_fb_is_layer_supported(struct komeda_fb *kfb, u32 layer_type)
+bool komeda_fb_is_layer_supported(struct komeda_fb *kfb, u32 layer_type,
+ u32 rot)
{
struct drm_framebuffer *fb = &kfb->base;
struct komeda_dev *mdev = fb->dev->dev_private;
- const struct komeda_format_caps *caps;
u32 fourcc = fb->format->format;
u64 modifier = fb->modifier;
+ bool supported;

- caps = komeda_get_format_caps(&mdev->fmt_tbl, fourcc, modifier);
- if (!caps)
- return false;
+ supported = komeda_format_mod_supported(&mdev->fmt_tbl, layer_type,
+ fourcc, modifier, rot);
+ if (!supported)
+ DRM_DEBUG_ATOMIC("Layer TYPE: %d doesn't support fb FMT: %s.\n",
+ layer_type, komeda_get_format_name(fourcc, modifier));

- if (!(caps->supported_layer_types & layer_type))
- return false;
-
- return true;
+ return supported;
}
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h
index e3bab0d..6cbb2f6 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.h
@@ -35,9 +35,10 @@ struct komeda_fb {

struct drm_framebuffer *
komeda_fb_create(struct drm_device *dev, struct drm_file *file,
- const struct drm_mode_fb_cmd2 *mode_cmd);
+ const struct drm_mode_fb_cmd2 *mode_cmd);
dma_addr_t
komeda_fb_get_pixel_addr(struct komeda_fb *kfb, int x, int y, int plane);
-bool komeda_fb_is_layer_supported(struct komeda_fb *kfb, u32 layer_type);
+bool komeda_fb_is_layer_supported(struct komeda_fb *kfb, u32 layer_type,
+ u32 rot);

#endif
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c
index 8c133e4..711dadc 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_pipeline_state.c
@@ -252,6 +252,11 @@ struct komeda_pipeline_state *
struct komeda_plane_state *kplane_st,
struct komeda_data_flow_cfg *dflow)
{
+ struct komeda_fb *kfb = to_kfb(kplane_st->base.fb);
+
+ if (!komeda_fb_is_layer_supported(kfb, layer->layer_type, dflow->rot))
+ return -EINVAL;
+
if (!in_range(&layer->hsize_in, dflow->in_w)) {
DRM_DEBUG_ATOMIC("src_w: %d is out of range.\n", dflow->in_w);
return -EINVAL;
@@ -337,7 +342,8 @@ struct komeda_pipeline_state *
struct komeda_layer_state *st;
int i;

- if (!komeda_fb_is_layer_supported(kfb, wb_layer->layer_type))
+ if (!komeda_fb_is_layer_supported(kfb, wb_layer->layer_type,
+ dflow->rot))
return -EINVAL;

c_st = komeda_component_get_state_and_set_user(&wb_layer->base,
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_plane.c b/drivers/gpu/drm/arm/display/komeda/komeda_plane.c
index 5e5bfdb..aae6fe6 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_plane.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_plane.c
@@ -170,7 +170,7 @@ static void komeda_plane_reset(struct drm_plane *plane)
u32 layer_type = kplane->layer->layer_type;

return komeda_format_mod_supported(&mdev->fmt_tbl, layer_type,
- format, modifier);
+ format, modifier, 0);
}

static const struct drm_plane_funcs komeda_plane_funcs = {
--
1.9.1