Re: [PATCH] arm64: drivers: clk: qoriq: increase array size of cmux_to_group

[Stephen Boyd]

Your subject should be "clk: qoriq: Increase array size of cmux_to_group"

Quoting Vabhav Sharma (2019-04-24 07:50:13)
> From: Yogesh Gaur <yogeshnarayan.gaur@xxxxxxx>
> 
> Increase size of cmux_to_group array, to accomdate entry of
> -1 termination.
> 
> Added -1, terminated, entry for 4080_cmux_grpX.
> 
> Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@xxxxxxx>
> Signed-off-by: Vabhav Sharma <vabhav.sharma@xxxxxxx>
> Acked-by: Scott Wood <oss@xxxxxxxxxxxx>
> Acked-by: Stephen Boyd <sboyd@xxxxxxxxxx>
> ---
>  drivers/clk/clk-qoriq.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
> index 1212a9b..f6606cf 100644
> --- a/drivers/clk/clk-qoriq.c
> +++ b/drivers/clk/clk-qoriq.c
> @@ -79,7 +79,7 @@ struct clockgen_chipinfo {
>         const struct clockgen_muxinfo *cmux_groups[2];
>         const struct clockgen_muxinfo *hwaccel[NUM_HWACCEL];
>         void (*init_periph)(struct clockgen *cg);
> -       int cmux_to_group[NUM_CMUX]; /* -1 terminates if fewer than NUM_CMUX */
> +       int cmux_to_group[NUM_CMUX+1]; /* array should be -1 terminated */

Please put space around that +.

>         u32 pll_mask;   /* 1 << n bit set if PLL n is valid */
>         u32 flags;      /* CG_xxx */
>  };
> @@ -601,7 +601,7 @@ static const struct clockgen_chipinfo chipinfo[] = {
>                         &p4080_cmux_grp1, &p4080_cmux_grp2
>                 },
>                 .cmux_to_group = {
> -                       0, 0, 0, 0, 1, 1, 1, 1
> +                       0, 0, 0, 0, 1, 1, 1, 1, -1
>                 },
>                 .pll_mask = 0x1f,
>         },

Did you want this patch to go through clk tree? I seem to have acked it,
which I don't remember. Usually when I ack something I assume it's going
through some other tree.