Re: [PATCH 2/2] RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs

[Sudeep Holla]

On Thu, Apr 25, 2019 at 11:24:56AM +0530, Yash Shah wrote:
> The driver currently supports only SiFive FU540-C000 platform.
> 
> The initial version of L2 cache controller driver includes:
> - Initial configuration reporting at boot up.
> - Support for ECC related functionality.
> 
> Signed-off-by: Yash Shah <yash.shah@xxxxxxxxxx>

[....]

> +static const struct file_operations l2_fops = {
> +	.owner = THIS_MODULE,
> +	.open = simple_open,
> +	.write = l2_write
> +};
> +
> +static void setup_sifive_debug(void)
> +{
> +	sifive_test = debugfs_create_dir("sifive_l2_cache", NULL);
> +	if (!sifive_test)

Drop the conditional check above, Greg K H removed lots of them recently.
In his words: When calling debugfs functions, there is no need to ever
check the return value.  The function can work or not, but the code
logic should never do something different based on this.

He may not like to see this :)

> +		return;
> +
> +	if (!debugfs_create_file("sifive_debug_inject_error", 0200,
> +				 sifive_test, NULL, &l2_fops))

Ditto.

> +		debugfs_remove_recursive(sifive_test);
> +}

--
Regards,
Sudeep