Re: [PATCH v2 1/5] dt-bindings: interrupt-controller: Add Renesas RZ/A1 Interrupt Controller

[Rob Herring]

On Wed, May 1, 2019 at 2:16 AM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
>
> Hi Rob,
>
> On Tue, Apr 30, 2019 at 10:26 PM Rob Herring <robh+dt@xxxxxxxxxx> wrote:
> > On Tue, Apr 30, 2019 at 10:34 AM Marc Zyngier <marc.zyngier@xxxxxxx> wrote:
> > > On 30/04/2019 16:02, Rob Herring wrote:
> > > > On Tue, Apr 30, 2019 at 7:13 AM Geert Uytterhoeven
> > > > <geert+renesas@xxxxxxxxx> wrote:
> > > >>
> > > >> Add DT bindings for the Renesas RZ/A1 Interrupt Controller.
> > > >>
> > > >> Signed-off-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
> > > >> ---
> > > >> v2:
> > > >>   - Add "renesas,gic-spi-base",
> > > >>   - Document RZ/A2M.
> > > >> ---
> > > >>  .../renesas,rza1-irqc.txt                     | 30 +++++++++++++++++++
> > > >>  1 file changed, 30 insertions(+)
> > > >>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,rza1-irqc.txt
> > > >>
> > > >> diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,rza1-irqc.txt b/Documentation/devicetree/bindings/interrupt-controller/renesas,rza1-irqc.txt
> > > >> new file mode 100644
> > > >> index 0000000000000000..ea8ddb6955338ccd
> > > >> --- /dev/null
> > > >> +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,rza1-irqc.txt
> > > >> @@ -0,0 +1,30 @@
> > > >> +DT bindings for the Renesas RZ/A1 Interrupt Controller
> > > >> +
> > > >> +The RZ/A1 Interrupt Controller is a front-end for the GIC found on Renesas
> > > >> +RZ/A1 and RZ/A2 SoCs:
> > > >> +  - IRQ sense select for 8 external interrupts, 1:1-mapped to 8 GIC SPI
> > > >> +    interrupts,
> > > >> +  - NMI edge select.
> > > >> +
> > > >> +Required properties:
> > > >> +  - compatible: Must be "renesas,<soctype>-irqc", and "renesas,rza1-irqc" as
> > > >> +               fallback.
> > > >> +               Examples with soctypes are:
> > > >> +                 - "renesas,r7s72100-irqc" (RZ/A1H)
> > > >> +                 - "renesas,r7s9210-irqc" (RZ/A2M)
> > > >> +  - #interrupt-cells: Must be 2 (an interrupt index and flags, as defined
> > > >> +                                in interrupts.txt in this directory)
> > > >> +  - interrupt-controller: Marks the device as an interrupt controller
> > > >> +  - reg: Base address and length of the memory resource used by the interrupt
> > > >> +         controller
> > > >> +  - renesas,gic-spi-base: Lowest GIC SPI interrupt number this block maps to.
> > > >
> > > > Why isn't this just an 'interrupts' property?
> > >
> > > That's likely because of kernel limitations. The DT code does an
> > > of_populate() on any device that it finds, parse the "interrupts"
> > > propertiy, resulting in the irq_descs being populated.
> > >
> > > That creates havoc, as these interrupts are not for this device, but for
> > > something that is connected to it. This is merely a bridge of some sort.
> >
> > 'interrupt-map' would avoid that problem I think.
>
> "interrupt-map" seems to be meant for translation on a bus?
> What to do with the child and parent unit addresses fields?
> The parent unit address size depends on the #address-cells of the parent
> interrupt-controller (i.e. GIC, so it's zero).
> But the child unit address size depends on the #address-cells of the bus node
> on which the child is located, so that's a (non-zero) bus #address-cells
> (from the root node), not an interrupt-controller #address-cells.

The #address-cells is always retrieved from the interrupt-parent node
(or its parent). The interrupt-parent can implicitly be the child's
parent, but that is rarely used in modern systems.

> Each line in an interrupt-map also contains a child interrupt specifier.
> As the RZ/A1 IRQC supports 8 interrupt inputs with 4 sense types,
> that would mean 32 lines? Or should I just ignore the senses here,
> and specify 0?

You can ignore parts of the child cells with interrupt-map-mask, so
you should just need 8 entries.

> i.e. interrupt-map = <0 0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH,
>                       0 1 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH,
>                       0 2 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH,
>                       0 3 0 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH,
>                       0 4 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH,
>                       0 5 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH,
>                       0 6 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH,
>                       0 7 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
>
> (using zero for the child unit addresses, too)?
>
> > > Furthermore, this is a rather long established practice: gic-v2m,
> > > gic-v3-mbi, mediatek,sysirq, mediatek,cirq... All the bits of glue that
> > > for one reason or another plug onto the GIC use the same method.
> >
> > All handling the mapping to the parent in their own way...
> >
> > > > Plus, without 'interrupts' walking the hierarchy is broken.
> > >
> > > Erm... Which hierarchy?
> >
> > of_irq_init() expects that an interrupt-controller without an
> > interrupt-parent is the root controller. So you're right. We only need
>
> That applies to IRQCHIP_DECLARE() drivers only, not platform device
> drivers, right?

Right.

Rob