Re: [PATCH] clk: imx: correct pfdv2 gate_bit/vld_bit operations

From: Stephen Boyd
Date: Fri May 03 2019 - 12:32:37 EST

Quoting Anson Huang (2019-04-25 23:53:14)
> The operations of pfdv2 gate_bit/valid_bit are incorrect,
> they are defined as u8 for bit offset, but gate_bit is
> actually assigned as mask which could be 32 bit long and
> it causes overflow, and vld_bit is assigned as bit offset
> based on incorrect gate_bit value, it causes incorrect
> pfd clock gate status in clock tree, this patch fixes the
> issue by assigning them as correct bit offset.
> Fixes: 9fcb6be3b6c9 ("clk: imx: add pfdv2 support")
> Signed-off-by: Anson Huang <Anson.Huang@xxxxxxx>
> ---

Applied to clk-next