[PATCH 6/8] perf/x86: Use update attribute groups for caps

From: Jiri Olsa
Date: Sat May 04 2019 - 08:53:07 EST


Using the new pmu::update_attrs attribute group for
"caps" directory.

Signed-off-by: Jiri Olsa <jolsa@xxxxxxxxxx>
---
arch/x86/events/core.c | 8 -------
arch/x86/events/intel/core.c | 44 ++++++++++++++++++++++++++++--------
arch/x86/events/perf_event.h | 1 -
3 files changed, 34 insertions(+), 19 deletions(-)

diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index 1889e45e6742..b7e907b5c4ea 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -1820,14 +1820,6 @@ static int __init init_hw_perf_events(void)

x86_pmu_format_group.attrs = x86_pmu.format_attrs;

- if (x86_pmu.caps_attrs) {
- struct attribute **tmp;
-
- tmp = merge_attr(x86_pmu_caps_group.attrs, x86_pmu.caps_attrs);
- if (!WARN_ON(!tmp))
- x86_pmu_caps_group.attrs = tmp;
- }
-
if (!x86_pmu.events_sysfs_show)
x86_pmu_events_group.attrs = &empty_attrs;

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 354396da90a8..235d06e2aac5 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -4402,6 +4402,18 @@ pebs_is_visible(struct kobject *kobj, struct attribute *attr, int i)
return x86_pmu.pebs ? attr->mode : 0;
}

+static umode_t
+lbr_is_visible(struct kobject *kobj, struct attribute *attr, int i)
+{
+ return x86_pmu.lbr_nr ? attr->mode : 0;
+}
+
+static umode_t
+exra_is_visible(struct kobject *kobj, struct attribute *attr, int i)
+{
+ return x86_pmu.version >= 2 ? attr->mode : 0;
+}
+
static struct attribute_group group_events_td = {
.name = "events",
};
@@ -4416,13 +4428,33 @@ static struct attribute_group group_events_tsx = {
.is_visible = tsx_is_visible,
};

+static struct attribute_group group_caps_gen = {
+ .name = "caps",
+ .attrs = intel_pmu_caps_attrs,
+};
+
+static struct attribute_group group_caps_lbr = {
+ .name = "caps",
+ .attrs = lbr_attrs,
+ .is_visible = lbr_is_visible,
+};
+
+static struct attribute_group group_format_extra = {
+ .name = "format",
+ .is_visible = exra_is_visible,
+};
+
static const struct attribute_group *attr_update[] = {
&group_events_td,
&group_events_mem,
&group_events_tsx,
+ &group_caps_gen,
+ &group_caps_lbr,
+ &group_format_extra,
NULL,
};

+
__init int intel_pmu_init(void)
{
struct attribute **extra_attr = NULL;
@@ -4986,15 +5018,11 @@ __init int intel_pmu_init(void)

snprintf(pmu_name_str, sizeof(pmu_name_str), "%s", name);

- if (version >= 2 && extra_attr) {
- x86_pmu.format_attrs = merge_attr(intel_arch3_formats_attr,
- extra_attr);
- WARN_ON(!x86_pmu.format_attrs);
- }

group_events_td.attrs = td_attr;
group_events_mem.attrs = mem_attr;
group_events_tsx.attrs = tsx_attr;
+ group_format_extra.attrs = extra_attr;

x86_pmu.attr_update = attr_update;

@@ -5044,12 +5072,8 @@ __init int intel_pmu_init(void)
x86_pmu.lbr_nr = 0;
}

- x86_pmu.caps_attrs = intel_pmu_caps_attrs;
-
- if (x86_pmu.lbr_nr) {
- x86_pmu.caps_attrs = merge_attr(x86_pmu.caps_attrs, lbr_attrs);
+ if (x86_pmu.lbr_nr)
pr_cont("%d-deep LBR, ", x86_pmu.lbr_nr);
- }

/*
* Access extra MSR may cause #GP under certain circumstances.
diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
index 7dd91607b5fa..1e3a7d74ea49 100644
--- a/arch/x86/events/perf_event.h
+++ b/arch/x86/events/perf_event.h
@@ -631,7 +631,6 @@ struct x86_pmu {
int attr_rdpmc_broken;
int attr_rdpmc;
struct attribute **format_attrs;
- struct attribute **caps_attrs;

ssize_t (*events_sysfs_show)(char *page, u64 config);
const struct attribute_group **attr_update;
--
2.20.1