[PATCH 7/8] perf/x86/intel: Use update attributes for skylake format
From: Jiri Olsa
Date: Sat May 04 2019 - 08:53:14 EST
Using the new pmu::update_attrs attribute group for
skylake specific format attributes.
Signed-off-by: Jiri Olsa <jolsa@xxxxxxxxxx>
---
arch/x86/events/intel/core.c | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 235d06e2aac5..dc08e4cf18b8 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -4444,6 +4444,11 @@ static struct attribute_group group_format_extra = {
.is_visible = exra_is_visible,
};
+static struct attribute_group group_format_extra_skl = {
+ .name = "format",
+ .is_visible = exra_is_visible,
+};
+
static const struct attribute_group *attr_update[] = {
&group_events_td,
&group_events_mem,
@@ -4451,17 +4456,18 @@ static const struct attribute_group *attr_update[] = {
&group_caps_gen,
&group_caps_lbr,
&group_format_extra,
+ &group_format_extra_skl,
NULL,
};
__init int intel_pmu_init(void)
{
+ struct attribute **extra_skl_attr = NULL;
struct attribute **extra_attr = NULL;
struct attribute **td_attr = NULL;
struct attribute **mem_attr = NULL;
struct attribute **tsx_attr = NULL;
- struct attribute **to_free = NULL;
union cpuid10_edx edx;
union cpuid10_eax eax;
union cpuid10_ebx ebx;
@@ -4949,8 +4955,7 @@ __init int intel_pmu_init(void)
x86_pmu.get_event_constraints = hsw_get_event_constraints;
extra_attr = boot_cpu_has(X86_FEATURE_RTM) ?
hsw_format_attr : nhm_format_attr;
- extra_attr = merge_attr(extra_attr, skl_format_attr);
- to_free = extra_attr;
+ extra_skl_attr = skl_format_attr;
td_attr = hsw_events_attrs;
mem_attr = hsw_mem_events_attrs;
tsx_attr = hsw_tsx_events_attrs;
@@ -4988,7 +4993,7 @@ __init int intel_pmu_init(void)
x86_pmu.get_event_constraints = icl_get_event_constraints;
extra_attr = boot_cpu_has(X86_FEATURE_RTM) ?
hsw_format_attr : nhm_format_attr;
- extra_attr = merge_attr(extra_attr, skl_format_attr);
+ extra_skl_attr = skl_format_attr;
mem_attr = icl_events_attrs;
tsx_attr = icl_tsx_events_attrs;
x86_pmu.rtm_abort_event = X86_CONFIG(.event=0xca, .umask=0x02);
@@ -5023,6 +5028,7 @@ __init int intel_pmu_init(void)
group_events_mem.attrs = mem_attr;
group_events_tsx.attrs = tsx_attr;
group_format_extra.attrs = extra_attr;
+ group_format_extra_skl.attrs = extra_skl_attr;
x86_pmu.attr_update = attr_update;
@@ -5103,7 +5109,6 @@ __init int intel_pmu_init(void)
if (x86_pmu.counter_freezing)
x86_pmu.handle_irq = intel_pmu_handle_irq_v4;
- kfree(to_free);
return 0;
}
--
2.20.1