I see that there is already err label in the ISR that could be jumped into. Hence, planning to share updated patch with the error handling.
On 6/7/19 5:18 AM, Dmitry Osipenko wrote:
07.06.2019 15:12, Dmitry Osipenko ÐÐÑÐÑ:OK. I shall send the updated patch.
07.06.2019 15:08, Dmitry Osipenko ÐÐÑÐÑ:
07.06.2019 14:55, Bitan Biswas ÐÐÑÐÑ:
Remove redundant BUG_ON calls or replace with WARN_ON_ONCE
as needed. Replace BUG() with error handling code.
Define I2C_ERR_UNEXPECTED_STATUS for error handling.
Signed-off-by: Bitan Biswas <bbiswas@xxxxxxxxxx>
---
 drivers/i2c/busses/i2c-tegra.c | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index 4dfb4c1..c407bd7 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -73,6 +73,7 @@
 #define I2C_ERR_NO_ACK BIT(0)
 #define I2C_ERR_ARBITRATION_LOST BIT(1)
 #define I2C_ERR_UNKNOWN_INTERRUPT BIT(2)
+#define I2C_ERR_UNEXPECTED_STATUSÂÂÂÂÂÂÂ BIT(3)
 #define PACKET_HEADER0_HEADER_SIZE_SHIFT 28
 #define PACKET_HEADER0_PACKET_ID_SHIFT 16
@@ -515,7 +516,6 @@ static int tegra_i2c_empty_rx_fifo(struct tegra_i2c_dev *i2c_dev)
ÂÂÂÂÂÂ * prevent overwriting past the end of buf
ÂÂÂÂÂÂ */
ÂÂÂÂÂ if (rx_fifo_avail > 0 && buf_remaining > 0) {
-ÂÂÂÂÂÂÂ BUG_ON(buf_remaining > 3);
ÂÂÂÂÂÂÂÂÂ val = i2c_readl(i2c_dev, I2C_RX_FIFO);
ÂÂÂÂÂÂÂÂÂ val = cpu_to_le32(val);
ÂÂÂÂÂÂÂÂÂ memcpy(buf, &val, buf_remaining);
@@ -523,7 +523,6 @@ static int tegra_i2c_empty_rx_fifo(struct tegra_i2c_dev *i2c_dev)
ÂÂÂÂÂÂÂÂÂ rx_fifo_avail--;
ÂÂÂÂÂ }
-ÂÂÂ BUG_ON(rx_fifo_avail > 0 && buf_remaining > 0);
ÂÂÂÂÂ i2c_dev->msg_buf_remaining = buf_remaining;
ÂÂÂÂÂ i2c_dev->msg_buf = buf;
@@ -581,7 +580,6 @@ static int tegra_i2c_fill_tx_fifo(struct tegra_i2c_dev *i2c_dev)
ÂÂÂÂÂÂ * boundary and fault.
ÂÂÂÂÂÂ */
ÂÂÂÂÂ if (tx_fifo_avail > 0 && buf_remaining > 0) {
-ÂÂÂÂÂÂÂ BUG_ON(buf_remaining > 3);
ÂÂÂÂÂÂÂÂÂ memcpy(&val, buf, buf_remaining);
ÂÂÂÂÂÂÂÂÂ val = le32_to_cpu(val);
@@ -847,10 +845,13 @@ static irqreturn_t tegra_i2c_isr(int irq, void *dev_id)
ÂÂÂÂÂ if (!i2c_dev->is_curr_dma_xfer) {
ÂÂÂÂÂÂÂÂÂ if (i2c_dev->msg_read && (status & I2C_INT_RX_FIFO_DATA_REQ)) {
-ÂÂÂÂÂÂÂÂÂÂÂ if (i2c_dev->msg_buf_remaining)
+ÂÂÂÂÂÂÂÂÂÂÂ if (i2c_dev->msg_buf_remaining) {
ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ tegra_i2c_empty_rx_fifo(i2c_dev);
-ÂÂÂÂÂÂÂÂÂÂÂ else
-ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ BUG();
+ÂÂÂÂÂÂÂÂÂÂÂ } else {
+ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ dev_err(i2c_dev->dev, "unexpected rx data request\n");
+ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ i2c_dev->msg_err |= I2C_ERR_UNEXPECTED_STATUS;
+ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ goto err;
+ÂÂÂÂÂÂÂÂÂÂÂ }
ÂÂÂÂÂÂÂÂÂ }
ÂÂÂÂÂÂÂÂÂ if (!i2c_dev->msg_read && (status & I2C_INT_TX_FIFO_DATA_REQ)) {
@@ -876,7 +877,7 @@ static irqreturn_t tegra_i2c_isr(int irq, void *dev_id)
ÂÂÂÂÂ if (status & I2C_INT_PACKET_XFER_COMPLETE) {
ÂÂÂÂÂÂÂÂÂ if (i2c_dev->is_curr_dma_xfer)
ÂÂÂÂÂÂÂÂÂÂÂÂÂ i2c_dev->msg_buf_remaining = 0;
-ÂÂÂÂÂÂÂ BUG_ON(i2c_dev->msg_buf_remaining);
+ÂÂÂÂÂÂÂ WARN_ON_ONCE(i2c_dev->msg_buf_remaining);
ÂÂÂÂÂÂÂÂÂ complete(&i2c_dev->msg_complete);
ÂÂÂÂÂ }
ÂÂÂÂÂ goto done;
Very nice, thank you very much! BTW, I think it may worth to add another
patch that will reset hardware state in a case of the warning since we
know that something gone wrong.
Reviewed-by: Dmitry Osipenko <digetx@xxxxxxxxx>
Something like that:
ÂÂÂÂÂ complete(&i2c_dev->msg_complete);
ÂÂÂÂif (WARN_ON_ONCE(i2c_dev->msg_buf_remaining))
ÂÂÂÂÂÂÂ goto err;
Ah, that's inside the ISR, so maybe will make sense to just not complete
the transfer and let it timeout:
ÂÂÂÂif (!WARN_ON_ONCE(i2c_dev->msg_buf_remaining))
ÂÂÂÂÂÂÂ complete(&i2c_dev->msg_complete);