[PATCH v4 0/5] Handle MCA banks in a per_cpu way

[Ghannam, Yazen]

From: Yazen Ghannam <yazen.ghannam@xxxxxxx>

The focus of this patchset is define and use the MCA bank structures
and bank count per logical CPU.

With the exception of patch 4, this set applies to systems in production
today.

Patch 1:
Moves the declaration of struct mce_banks[] to the only file it's used.

Patch 2:
Splits struct mce_bank into a structure for fields common to MCA banks
on all CPUs and another structure that can be used per_cpu.

Patch 3:
Brings full circle the saga of the threshold block addresses on SMCA
systems. After taking a step back and reviewing the AMD documentation, I
think that this implimentation is the simplest and more robust way to
follow the spec.

Patch 4:
Saves and uses the MCA bank count as a per_cpu variable. This is to
support systems that have MCA bank counts that are different between
logical CPUs.

Patch 5:
Checks if an MCA banks is enabled after initialization.

Link:
https://lkml.kernel.org/r/20190430203206.104163-1-Yazen.Ghannam@xxxxxxx

Thanks,
Yazen

Yazen Ghannam (5):
  x86/MCE: Make struct mce_banks[] static
  x86/MCE: Make mce_banks a per-CPU array
  x86/MCE/AMD: Don't cache block addresses on SMCA systems
  x86/MCE: Make the number of MCA banks a per-CPU variable
  x86/MCE: Determine MCA banks' init state properly

 arch/x86/kernel/cpu/mce/amd.c      |  92 +++++++++--------
 arch/x86/kernel/cpu/mce/core.c     | 161 +++++++++++++++++++++--------
 arch/x86/kernel/cpu/mce/internal.h |  12 +--
 3 files changed, 165 insertions(+), 100 deletions(-)

-- 
2.17.1