Re: [RFC PATCH] x86/cpufeatures: Enumerate new AVX512 bfloat16 instructions

[Borislav Petkov]

On Tue, Jun 11, 2019 at 11:19:20AM -0700, Fenghua Yu wrote:
> So can I re-organize word 11 and 12 as follows?
> 
> 1. Change word 11 to host scattered features.
> 2. Move the previos features in word 11 and word 12 to word 11:
> /*
>  * Extended auxiliary flags: Linux defined - For features scattered in various
>  * CPUID levels and sub-leaves like CPUID level 7 and sub-leaf 1, etc, word 19.
>  */
> #define X86_FEATURE_CQM_LLC             (11*32+ 0) /* LLC QoS if 1 */
> #define X86_FEATURE_CQM_OCCUP_LLC       (11*32+ 1) /* LLC occupancy monitoring */
> #define X86_FEATURE_CQM_MBM_TOTAL       (11*32+ 2) /* LLC Total MBM monitoring */
> #define X86_FEATURE_CQM_MBM_LOCAL       (11*32+ 3) /* LLC Local MBM monitoring */

Yap.

> 3. Change word 12 to host CPUID.(EAX=7,ECX=1):EAX:
> /* Intel-defined CPU features, CPUID level 0x7:1 (EAX), word 12 */
> #define X86_FEATURE_AVX512_BF16         (12*32+ 0) /* BFLOAT16 instructions */

This needs to be (12*32+ 5) if word 12 is going to map leaf
CPUID.(EAX=7,ECX=1):EAX.

At least judging from the arch extensions doc which lists EAX as:

Bits 04-00: Reserved.
Bit 05: AVX512_BF16. Vector Neural Network Instructions supporting BFLOAT16 inputs and conversion instructions from IEEE single precision.
Bits 31-06: Reserved.

> 4. Do other necessary changes to match the new word 11 and word 12.

But split in two patches: first does steps 1+2, second patch adds the
new leaf to word 12.

Thx.

-- 
Regards/Gruss,
    Boris.

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