[PATCH v2 5/5] perf jevents: Add support for Hisi hip08 L3C PMU aliasing

From: John Garry
Date: Fri Jun 14 2019 - 10:14:31 EST


Add support for Hisi hip08 L3C PMU aliasing.

The kernel driver is in drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c

Signed-off-by: John Garry <john.garry@xxxxxxxxxx>
---
.../arm64/hisilicon/hip08/uncore-l3c.json | 37 +++++++++++++++++++
tools/perf/pmu-events/jevents.c | 1 +
2 files changed, 38 insertions(+)
create mode 100644 tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json

diff --git a/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json
new file mode 100644
index 000000000000..ca48747642e1
--- /dev/null
+++ b/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/uncore-l3c.json
@@ -0,0 +1,37 @@
+[
+ {
+ "EventCode": "0x00",
+ "EventName": "uncore_hisi_l3c.rd_cpipe",
+ "BriefDescription": "Total read accesses",
+ "PublicDescription": "Total read accesses",
+ "Unit": "hisi_sccl,l3c",
+ },
+ {
+ "EventCode": "0x01",
+ "EventName": "uncore_hisi_l3c.wr_cpipe",
+ "BriefDescription": "Total write accesses",
+ "PublicDescription": "Total write accesses",
+ "Unit": "hisi_sccl,l3c",
+ },
+ {
+ "EventCode": "0x02",
+ "EventName": "uncore_hisi_l3c.rd_hit_cpipe",
+ "BriefDescription": "Total read hits",
+ "PublicDescription": "Total read hits",
+ "Unit": "hisi_sccl,l3c",
+ },
+ {
+ "EventCode": "0x03",
+ "EventName": "uncore_hisi_l3c.wr_hit_cpipe",
+ "BriefDescription": "Total write hits",
+ "PublicDescription": "Total write hits",
+ "Unit": "hisi_sccl,l3c",
+ },
+ {
+ "EventCode": "0x04",
+ "EventName": "uncore_hisi_l3c.victim_num",
+ "BriefDescription": "l3c precharge commands",
+ "PublicDescription": "l3c precharge commands",
+ "Unit": "hisi_sccl,l3c",
+ },
+]
diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c
index 909e53e3b5bd..7d241efd03de 100644
--- a/tools/perf/pmu-events/jevents.c
+++ b/tools/perf/pmu-events/jevents.c
@@ -238,6 +238,7 @@ static struct map {
{ "UPI LL", "uncore_upi" },
{ "hisi_sccl,ddrc", "hisi_sccl,ddrc" },
{ "hisi_sccl,hha", "hisi_sccl,hha" },
+ { "hisi_sccl,l3c", "hisi_sccl,l3c" },
{}
};

--
2.17.1