Re: Fwd: Re: [PATCH] pinctrl: qcom: Clear status bit on irq_unmask

From: Neeraj Upadhyay
Date: Mon Jun 17 2019 - 06:40:22 EST



Quoting tengfeif@xxxxxxxxxxxxxx (2019-06-11 03:41:26)
On 2019-06-10 22:51, Stephen Boyd wrote:
> Quoting Linus Walleij (2019-06-07 14:08:10)
>> On Fri, May 31, 2019 at 8:52 AM Tengfei Fan <tengfeif@xxxxxxxxxxxxxx> >> wrote:
>> >> > The gpio interrupt status bit is getting set after the
>> > irq is disabled and causing an immediate interrupt after
>> > enablling the irq, so clear status bit on irq_unmask.
>> >
>> > Signed-off-by: Tengfei Fan <tengfeif@xxxxxxxxxxxxxx>
>> >> This looks pretty serious, can one of the Qcom maintainers ACK
>> this?
>> >> Should it be sent to fixes and even stable?
>> >> Fixes: tag?
>> > > How is the interrupt status bit getting set after the irq is disabled?
> It looks like this is a level type interrupt? I thought that after
> commit b55326dc969e ("pinctrl: msm: Really mask level interrupts to
> prevent latching") this wouldn't be a problem. Am I wrong, or is qcom
> just clearing out patches on drivers and this is the last one that > needs
> to be upstreamed?

Your patch(commit b55326dc969e) can cover our issue, and my patch is no longer needed.
Your patch isn't included in our code, so I submitted this patch.

Alright cool. Sounds like this patch can be dropped then and you can
pick up the patch from upstream into your vendor kernel.


Hi Stephen, there is one use case with is not covered by commit b55326dc969e (

"pinctrl: msm: Really mask level interrupts to prevent latching"). That happens when

gpio line is toggled between i/o mode and interrupt mode :

1. GPIO is configured as irq line. Peripheral raises interrupt.

2. IRQ handler runs and disables the irq line (through wq work).

3. GPIO is configured for input and and data is received from the peripheral.

4. Now, when GPIO is re-enabled as irq, we see spurious irq, and there isn't

any data received on the gpio line, when it is read back after configuring as input.

This can happen for both edge and level interrupts.

Patch https://lkml.org/lkml/2019/6/17/226 tries to cover this use case. Can you please

provide your comments?


Thanks

Neeraj

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