RE: [PATCH 3/3] mmc: sdhci-of-arasan: Add support for ZynqMP Platform Tap Delays Setup

[Manish Narani]

Hi Uffe,

Thanks for the review. Please find my comments below.

> -----Original Message-----
> From: Ulf Hansson <ulf.hansson@xxxxxxxxxx>
> Sent: Monday, June 17, 2019 8:29 PM
> To: Michal Simek <michals@xxxxxxxxxx>
> Cc: Manish Narani <MNARANI@xxxxxxxxxx>; Rob Herring
> <robh+dt@xxxxxxxxxx>; Mark Rutland <mark.rutland@xxxxxxx>; Adrian
> Hunter <adrian.hunter@xxxxxxxxx>; Rajan Vaja <RAJANV@xxxxxxxxxx>; Jolly
> Shah <JOLLYS@xxxxxxxxxx>; Nava kishore Manne <navam@xxxxxxxxxx>; Olof
> Johansson <olof@xxxxxxxxx>; linux-mmc@xxxxxxxxxxxxxxx; DTML
> <devicetree@xxxxxxxxxxxxxxx>; Linux Kernel Mailing List <linux-
> kernel@xxxxxxxxxxxxxxx>; Linux ARM <linux-arm-kernel@xxxxxxxxxxxxxxxxxxx>
> Subject: Re: [PATCH 3/3] mmc: sdhci-of-arasan: Add support for ZynqMP
> Platform Tap Delays Setup
> 
> [...]
> 
> > >>
> > >>
> > >>> In regards to the mmc data part, I suggest to drop the
> > >>> ->set_tap_delay() callback, but rather use a boolean flag to indicate
> > >>> whether clock phases needs to be changed for the variant. Potentially
> > >>> that could even be skipped and instead call clk_set_phase()
> > >>> unconditionally, as the clock core deals fine with clock providers
> > >>> that doesn't support the ->set_phase() callback.

In the current implementation, I am taking care of both the input and
output clock delays with the single clock (which is output clock) registration
and differentiating these tap delays based on their values
(<256 then input delay and  >= 256 then output delay), because that is
zynqmp specific. If we want to make this generic, we may need to
register 'another' clock which will be there as an input (sampling) clock
and then we can make this 'clk_set_phase()' be called unconditionally
each for both the clocks and let the platforms handle their clock part.
What's your take on this?

Thanks,
Manish
> > >>
> > >> In connection to another version of this driver for latest Xilinx chip
> > >> it would be better to keep set_tap_delay callback in the driver. The
> > >> reason is that new chip/ip is capable to setup tap delays directly
> > >> without asking firmware to do it. That's why for versal IP there is a
> > >> need to call different setup_tap_delay function.
> > >
> > > The ->set_tap_delay() callback is for ZyncMp pointing to
> > > sdhci_arasan_zynqmp_set_tap_delay(). This function calls the
> > > clk_set_phase() API.
> > >
> > > What does ->set_tap_delay() do for the latest version?
> >
> > There is different set of default tap delays which should be programmed
> > and it is done just via writing to registers which are the part of
> > controller address space.
> 
> Okay, I see.
> 
> Not sure what makes most sense to do here, but it sounds to me like
> another ->set_phase() callback should be implemented for the clock
> provider. In other words, calling clk_set_phase() should continue to
> works just fine for this case as well. If it turns out to be
> inconvenient, we can always add the ->set_tap_delay() at a later point
> when it makes more sense.


> 
> [...]
> 
> Kind regards
> Uffe