[tip:x86/cpu] ACPI, x86: Add Zhaoxin processors support for NONSTOP TSC

From: tip-bot for Tony W Wang-oc
Date: Sat Jun 22 2019 - 06:17:54 EST


Commit-ID: 773b2f30a3fc026f3ed121a8b945b0ae19b64ec5
Gitweb: https://git.kernel.org/tip/773b2f30a3fc026f3ed121a8b945b0ae19b64ec5
Author: Tony W Wang-oc <TonyWWang-oc@xxxxxxxxxxx>
AuthorDate: Tue, 18 Jun 2019 08:37:14 +0000
Committer: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
CommitDate: Sat, 22 Jun 2019 11:45:57 +0200

ACPI, x86: Add Zhaoxin processors support for NONSTOP TSC

Zhaoxin CPUs have NONSTOP TSC feature, so enable the ACPI
driver support for it.

Signed-off-by: Tony W Wang-oc <TonyWWang-oc@xxxxxxxxxxx>
Signed-off-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
Cc: "hpa@xxxxxxxxx" <hpa@xxxxxxxxx>
Cc: "gregkh@xxxxxxxxxxxxxxxxxxx" <gregkh@xxxxxxxxxxxxxxxxxxx>
Cc: "rjw@xxxxxxxxxxxxx" <rjw@xxxxxxxxxxxxx>
Cc: "lenb@xxxxxxxxxx" <lenb@xxxxxxxxxx>
Cc: David Wang <DavidWang@xxxxxxxxxxx>
Cc: "Cooper Yan(BJ-RD)" <CooperYan@xxxxxxxxxxx>
Cc: "Qiyuan Wang(BJ-RD)" <QiyuanWang@xxxxxxxxxxx>
Cc: "Herry Yang(BJ-RD)" <HerryYang@xxxxxxxxxxx>
Link: https://lkml.kernel.org/r/d1cfd937dabc44518d42038b55522c53@xxxxxxxxxxx

---
drivers/acpi/acpi_pad.c | 1 +
drivers/acpi/processor_idle.c | 1 +
2 files changed, 2 insertions(+)

diff --git a/drivers/acpi/acpi_pad.c b/drivers/acpi/acpi_pad.c
index 6b3f1217a237..e7dc0133f817 100644
--- a/drivers/acpi/acpi_pad.c
+++ b/drivers/acpi/acpi_pad.c
@@ -64,6 +64,7 @@ static void power_saving_mwait_init(void)
case X86_VENDOR_HYGON:
case X86_VENDOR_AMD:
case X86_VENDOR_INTEL:
+ case X86_VENDOR_ZHAOXIN:
/*
* AMD Fam10h TSC will tick in all
* C/P/S0/S1 states when this bit is set.
diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c
index e387a258d649..ed56c6d20b08 100644
--- a/drivers/acpi/processor_idle.c
+++ b/drivers/acpi/processor_idle.c
@@ -196,6 +196,7 @@ static void tsc_check_state(int state)
case X86_VENDOR_AMD:
case X86_VENDOR_INTEL:
case X86_VENDOR_CENTAUR:
+ case X86_VENDOR_ZHAOXIN:
/*
* AMD Fam10h TSC will tick in all
* C/P/S0/S1 states when this bit is set.