Re: [PATCH v7 1/5] mtd: cfi_cmdset_0002: Add support for polling status register

[Vignesh Raghavendra]

Hi,

On 24/06/19 10:16 PM, Tokunori Ikegami wrote:
> 
[...]
>> Â +/*
>> + * Use status register to poll for Erase/write completion when DQ is not
>> + * supported. This is indicated by Bit[1:0] of SoftwareFeatures field in
>> + * CFI Primary Vendor-Specific Extended Query table 1.5
>> + */
>> +static int cfi_use_status_reg(struct cfi_private *cfi)
>> +{
>> +ÂÂÂ struct cfi_pri_amdstd *extp = cfi->cmdset_priv;
>> +
>> +ÂÂÂ return extp->MinorVersion >= '5' &&
>> +ÂÂÂÂÂÂÂ (extp->SoftwareFeatures & 0x3) == 0x1;
> 
> Seems to be better to use defined values instead of 0x3 and 0x1 hard
> coded values.
> 

Ok

>> +}
>> +
>> +static void cfi_check_err_status(struct map_info *map, unsigned long
>> adr)
>> +{
>> +ÂÂÂ struct cfi_private *cfi = map->fldrv_priv;
>> +ÂÂÂ map_word status;
>> +
>> +ÂÂÂ if (!cfi_use_status_reg(cfi))
>> +ÂÂÂÂÂÂÂ return;
>> +
>> +ÂÂÂ cfi_send_gen_cmd(0x70, cfi->addr_unlock1, 0, map, cfi,
> 
> Is it not necessary to set chip->start as the base parameter for
> cfi_send_gen_cmd()?
> 

Right now, I am not aware of any flash that supports status registers
and are banked (that's when  chip->start can be non zero). Therefore I
did not think of using chip->start.
But anyways, I will fix this up to use chip->start here and elsewhere
for next version, assuming there will be such chips in the future.

>> +ÂÂÂÂÂÂÂÂÂÂÂÂ cfi->device_type, NULL);
>> +ÂÂÂ status = map_read(map, adr);
>> +
>> +ÂÂÂ if (map_word_bitsset(map, status, CMD(0x3a))) {
>> +ÂÂÂÂÂÂÂ unsigned long chipstatus = MERGESTATUS(status);
>> +
>> +ÂÂÂÂÂÂÂ if (chipstatus & CFI_SR_ESB)
>> +ÂÂÂÂÂÂÂÂÂÂÂ pr_err("%s erase operation failed, status %lx\n",
>> +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ map->name, chipstatus);
>> +ÂÂÂÂÂÂÂ if (chipstatus & CFI_SR_PSB)
>> +ÂÂÂÂÂÂÂÂÂÂÂ pr_err("%s program operation failed, status %lx\n",
>> +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ map->name, chipstatus);
>> +ÂÂÂÂÂÂÂ if (chipstatus & CFI_SR_WBASB)
>> +ÂÂÂÂÂÂÂÂÂÂÂ pr_err("%s buffer program command aborted, status %lx\n",
>> +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ map->name, chipstatus);
>> +ÂÂÂÂÂÂÂ if (chipstatus & CFI_SR_SLSB)
>> +ÂÂÂÂÂÂÂÂÂÂÂ pr_err("%s sector write protected, status %lx\n",
>> +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ map->name, chipstatus);
>> +ÂÂÂ }
>> +}
>> Â Â /* #define DEBUG_CFI_FEATURES */
>> Â @@ -744,8 +796,22 @@ static struct mtd_info *cfi_amdstd_setup(struct
>> mtd_info *mtd)
>> ÂÂ */
>> Â static int __xipram chip_ready(struct map_info *map, unsigned long
>> addr)
>> Â {
>> +ÂÂÂ struct cfi_private *cfi = map->fldrv_priv;
>> ÂÂÂÂÂ map_word d, t;
>> Â +ÂÂÂ if (cfi_use_status_reg(cfi)) {
>> +ÂÂÂÂÂÂÂ map_word ready = CMD(CFI_SR_DRB);
>> +ÂÂÂÂÂÂÂ /*
>> +ÂÂÂÂÂÂÂÂ * For chips that support status register, check device
>> +ÂÂÂÂÂÂÂÂ * ready bit
>> +ÂÂÂÂÂÂÂÂ */
>> +ÂÂÂÂÂÂÂ cfi_send_gen_cmd(0x70, cfi->addr_unlock1, 0, map, cfi,
> 
> Same comment as cfi_check_err_status() about the base address.
> 
>> +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ cfi->device_type, NULL);
>> +ÂÂÂÂÂÂÂ d = map_read(map, addr);
>> +
>> +ÂÂÂÂÂÂÂ return map_word_andequal(map, d, ready, ready);
>> +ÂÂÂ }
>> +
>> ÂÂÂÂÂ d = map_read(map, addr);
>> ÂÂÂÂÂ t = map_read(map, addr);
>> Â @@ -769,8 +835,27 @@ static int __xipram chip_ready(struct map_info
>> *map, unsigned long addr)
>> ÂÂ */
>> Â static int __xipram chip_good(struct map_info *map, unsigned long
>> addr, map_word expected)
>> Â {
>> +ÂÂÂ struct cfi_private *cfi = map->fldrv_priv;
>> ÂÂÂÂÂ map_word oldd, curd;
>> Â +ÂÂÂ if (cfi_use_status_reg(cfi)) {
>> +ÂÂÂÂÂÂÂ map_word ready = CMD(CFI_SR_DRB);
>> +ÂÂÂÂÂÂÂ map_word err = CMD(CFI_SR_PSB | CFI_SR_ESB);
> 
> Is it not necessary to check CFI_SR_WBASB and CFI_SR_SLSB that are
> checked by cfi_check_err_status()?
> 

chip_good() is used to verify whether write or erase operation really
succeeded. Looking at Cypress HyperFlash datasheets and app notes on
status register polling, its enough to see if CFI_SR_PSB or CFI_SR_PSB
is set to know if write or erase failed. Now, the reason for program or
erase failure can be known by looking at CFI_SR_WBASB and CFI_SR_SLSB
which is done for cfi_check_err_status().
Therefore, I feel, its enough to look for CFI_SR_PSB or CFI_SR_ESB here.

Thanks for the review!

Regards
Vignesh

>> +ÂÂÂÂÂÂÂ /*
>> +ÂÂÂÂÂÂÂÂ * For chips that support status register, check device
>> +ÂÂÂÂÂÂÂÂ * ready bit and Erase/Program status bit to know if
>> +ÂÂÂÂÂÂÂÂ * operation succeeded.
>> +ÂÂÂÂÂÂÂÂ */
>> +ÂÂÂÂÂÂÂ cfi_send_gen_cmd(0x70, cfi->addr_unlock1, 0, map, cfi,
> 
> Same as cfi_check_err_status() and chip_ready() about the base address.
> 
>> +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂ cfi->device_type, NULL);
>> +ÂÂÂÂÂÂÂ curd = map_read(map, addr);
>> +
>> +ÂÂÂÂÂÂÂ if (map_word_andequal(map, curd, ready, ready))
>> +ÂÂÂÂÂÂÂÂÂÂÂ return !map_word_bitsset(map, curd, err);
>> +
>> +ÂÂÂÂÂÂÂ return 0;
>> +ÂÂÂ }
>> +
>> ÂÂÂÂÂ oldd = map_read(map, addr);
>> ÂÂÂÂÂ curd = map_read(map, addr);
>> Â @@ -1644,6 +1729,7 @@ static int __xipram do_write_oneword(struct
>> map_info *map, struct flchip *chip,
>> ÂÂÂÂÂ /* Did we succeed? */
>> ÂÂÂÂÂ if (!chip_good(map, adr, datum)) {
>> ÂÂÂÂÂÂÂÂÂ /* reset on all failures. */
>> +ÂÂÂÂÂÂÂ cfi_check_err_status(map, adr);
>> ÂÂÂÂÂÂÂÂÂ map_write(map, CMD(0xF0), chip->start);
>> ÂÂÂÂÂÂÂÂÂ /* FIXME - should have reset delay before continuing */
>> Â @@ -1901,6 +1987,7 @@ static int __xipram do_write_buffer(struct
>> map_info *map, struct flchip *chip,
>> ÂÂÂÂÂÂ * See e.g.
>> ÂÂÂÂÂÂ *
>> http://www.spansion.com/Support/Application%20Notes/MirrorBit_Write_Buffer_Prog_Page_Buffer_Read_AN.pdf
>>
>> ÂÂÂÂÂÂ */
>> +ÂÂÂ cfi_check_err_status(map, adr);
>> ÂÂÂÂÂ cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi,
>> ÂÂÂÂÂÂÂÂÂÂÂÂÂÂ cfi->device_type, NULL);
>> ÂÂÂÂÂ cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi,
>> @@ -2107,6 +2194,7 @@ static int do_panic_write_oneword(struct
>> map_info *map, struct flchip *chip,
>> Â ÂÂÂÂÂ if (!chip_good(map, adr, datum)) {
>> ÂÂÂÂÂÂÂÂÂ /* reset on all failures. */
>> +ÂÂÂÂÂÂÂ cfi_check_err_status(map, adr);
>> ÂÂÂÂÂÂÂÂÂ map_write(map, CMD(0xF0), chip->start);
>> ÂÂÂÂÂÂÂÂÂ /* FIXME - should have reset delay before continuing */
>> Â @@ -2316,6 +2404,7 @@ static int __xipram do_erase_chip(struct
>> map_info *map, struct flchip *chip)
>> ÂÂÂÂÂ /* Did we succeed? */
>> ÂÂÂÂÂ if (ret) {
>> ÂÂÂÂÂÂÂÂÂ /* reset on all failures. */
>> +ÂÂÂÂÂÂÂ cfi_check_err_status(map, adr);
>> ÂÂÂÂÂÂÂÂÂ map_write(map, CMD(0xF0), chip->start);
>> ÂÂÂÂÂÂÂÂÂ /* FIXME - should have reset delay before continuing */
>> Â @@ -2412,6 +2501,7 @@ static int __xipram do_erase_oneblock(struct
>> map_info *map, struct flchip *chip,
>> ÂÂÂÂÂ /* Did we succeed? */
>> ÂÂÂÂÂ if (ret) {
>> ÂÂÂÂÂÂÂÂÂ /* reset on all failures. */
>> +ÂÂÂÂÂÂÂ cfi_check_err_status(map, adr);
>> ÂÂÂÂÂÂÂÂÂ map_write(map, CMD(0xF0), chip->start);
>> ÂÂÂÂÂÂÂÂÂ /* FIXME - should have reset delay before continuing */
>> Â diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h
>> index 208c87cf2e3e..b50416169049 100644
>> --- a/include/linux/mtd/cfi.h
>> +++ b/include/linux/mtd/cfi.h
>> @@ -219,6 +219,11 @@ struct cfi_pri_amdstd {
>>  uint8_t VppMin;
>>  uint8_t VppMax;
>>  uint8_t TopBottom;
>> +ÂÂÂ /* Below field are added from version 1.5 */
>> + uint8_t ProgramSuspend;
>> + uint8_t UnlockBypass;
>> + uint8_t SecureSiliconSector;
>> + uint8_t SoftwareFeatures;
>> Â } __packed;
>> Â Â /* Vendor-Specific PRI for Atmel chips (command set 0x0002) */

-- 
Regards
Vignesh