[PATCH v4, 31/33] drm/mediatek: add connection from DITHER0 to DSI0

From: yongqiang.niu
Date: Mon Jul 08 2019 - 18:35:16 EST


From: Yongqiang Niu <yongqiang.niu@xxxxxxxxxxxx>

This patch add connection from DITHER0 to DSI0

Signed-off-by: Yongqiang Niu <yongqiang.niu@xxxxxxxxxxxx>
---
drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 5 +++++
1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index 4d75cef..c4c8531 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
@@ -43,10 +43,12 @@

#define MT8183_DISP_OVL0_2L_MOUT_EN 0xf04
#define MT8183_DISP_OVL1_2L_MOUT_EN 0xf08
+#define MT8183_DISP_DITHER0_MOUT_EN 0xf0c
#define MT8183_DISP_PATH0_SEL_IN 0xf24

#define OVL0_2L_MOUT_EN_DISP_PATH0 BIT(0)
#define OVL1_2L_MOUT_EN_RDMA1 BIT(4)
+#define DITHER0_MOUT_IN_DSI0 BIT(0)
#define DISP_PATH0_SEL_IN_OVL0_2L 0x1

#define MT2701_DISP_MUTEX0_MOD0 0x2c
@@ -331,6 +333,9 @@ static unsigned int mtk_ddp_mout_en(const struct mtk_mmsys_reg_data *data,
next == DDP_COMPONENT_RDMA1) {
*addr = MT8183_DISP_OVL1_2L_MOUT_EN;
value = OVL1_2L_MOUT_EN_RDMA1;
+ } else if (cur == DDP_COMPONENT_DITHER && next == DDP_COMPONENT_DSI0) {
+ *addr = MT8183_DISP_DITHER0_MOUT_EN;
+ value = DITHER0_MOUT_IN_DSI0;
} else {
value = 0;
}
--
1.8.1.1.dirty