[PATCH 0/5] MIPS: ralink: add CPU clock detection for MT7621
From: Chuanhong Guo
Date: Tue Jul 09 2019 - 14:22:02 EST
This patchset ports CPU clock detection for MT7621 from OpenWrt.
Last time I sent this, I forgot to add an binding include which
caused a compile error and the patch doesn't stay in linux-next.
This patchset resent the first two commits and also added binding
documentation for mt7621-pll and used it in mt7621-dts at
drivers/staging.
BTW: What should I do with such a patchset that touches multiple
parts in kernel?
Is it correct to send the entire patchset to lists of all involved
subsystems?
Chuanhong Guo (5):
MIPS: ralink: add dt binding header for mt7621-pll
MIPS: ralink: fix cpu clock of mt7621 and add dt clk devices
dt: bindings: add mt7621-pll dt binding documentation
staging: mt7621-dts: add dt nodes for mt7621-pll
staging: mt7621-dts: fix register range of memc node in mt7621.dtsi
.../bindings/clock/mediatek,mt7621-pll.txt | 19 ++++
arch/mips/include/asm/mach-ralink/mt7621.h | 20 ++++
arch/mips/ralink/mt7621.c | 102 ++++++++++++------
arch/mips/ralink/timer-gic.c | 4 +-
drivers/staging/mt7621-dts/mt7621.dtsi | 17 ++-
include/dt-bindings/clock/mt7621-clk.h | 14 +++
6 files changed, 134 insertions(+), 42 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt7621-pll.txt
create mode 100644 include/dt-bindings/clock/mt7621-clk.h
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2.21.0