Re: [PATCH] lib/mpi: fix building with 32-bit x86

[Nick Desaulniers]

On Fri, Jul 12, 2019 at 2:07 AM Arnd Bergmann <arnd@xxxxxxxx> wrote:
>
> The mpi library contains some rather old inline assembly statements
> that produce a lot of warnings for 32-bit x86, such as:
>
> lib/mpi/mpih-div.c:76:16: error: invalid use of a cast in a inline asm context requiring an l-value: remove the cast or build with -fheinous-gnu-extensions

I feel like I'm having flashbacks here:
https://lore.kernel.org/linuxppc-dev/CAKwvOd=f9OOR=i10q_auQuQCVH657neQtjt51UA176p_PMOHVw@xxxxxxxxxxxxxx/
Reviewed-by: Nick Desaulniers <ndesaulniers@xxxxxxxxxx>
(Thanks for the patch!)

>                                 udiv_qrnnd(qp[i], n1, n1, np[i], d);
>                                 ~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~
> lib/mpi/longlong.h:423:20: note: expanded from macro 'udiv_qrnnd'
>         : "=a" ((USItype)(q)), \
>                 ~~~~~~~~~~^~
>
> There is no point in doing a type cast for the output of an inline assembler
> statement, so just remove the cast here, as we have done for other architectures
> in the past.
>
> See-also: dea632cadd12 ("lib/mpi: fix build with clang")
> Signed-off-by: Arnd Bergmann <arnd@xxxxxxxx>
> ---
>  lib/mpi/longlong.h | 16 ++++++++--------
>  1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/lib/mpi/longlong.h b/lib/mpi/longlong.h
> index 08c60d10747f..3bb6260d8f42 100644
> --- a/lib/mpi/longlong.h
> +++ b/lib/mpi/longlong.h
> @@ -397,8 +397,8 @@ do { \
>  #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
>         __asm__ ("addl %5,%1\n" \
>            "adcl %3,%0" \
> -       : "=r" ((USItype)(sh)), \
> -            "=&r" ((USItype)(sl)) \
> +       : "=r" (sh), \
> +            "=&r" (sl) \
>         : "%0" ((USItype)(ah)), \
>              "g" ((USItype)(bh)), \
>              "%1" ((USItype)(al)), \
> @@ -406,22 +406,22 @@ do { \
>  #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
>         __asm__ ("subl %5,%1\n" \
>            "sbbl %3,%0" \
> -       : "=r" ((USItype)(sh)), \
> -            "=&r" ((USItype)(sl)) \
> +       : "=r" (sh), \
> +            "=&r" (sl) \
>         : "0" ((USItype)(ah)), \
>              "g" ((USItype)(bh)), \
>              "1" ((USItype)(al)), \
>              "g" ((USItype)(bl)))
>  #define umul_ppmm(w1, w0, u, v) \
>         __asm__ ("mull %3" \
> -       : "=a" ((USItype)(w0)), \
> -            "=d" ((USItype)(w1)) \
> +       : "=a" (w0), \
> +            "=d" (w1) \
>         : "%0" ((USItype)(u)), \
>              "rm" ((USItype)(v)))
>  #define udiv_qrnnd(q, r, n1, n0, d) \
>         __asm__ ("divl %4" \
> -       : "=a" ((USItype)(q)), \
> -            "=d" ((USItype)(r)) \
> +       : "=a" (q), \
> +            "=d" (r) \

-- 
Thanks,
~Nick Desaulniers