Re: [RFC PATCH, x86]: Disable CPA cache flush for selfsnoop targets

[Andi Kleen]

Uros Bizjak <ubizjak@xxxxxxxxx> writes:

> Recent patch [1] disabled a self-snoop feature on a list of processor
> models with a known errata, so we are confident that the feature
> should work on remaining models also for other purposes than to speed
> up MTRR programming.

MTRR is very different than TLBs.

>From my understanding not flushing with PAT is only safe everywhere when
the memory is only used for coherent devices (like the Internal GPU on
Intel CPUs). We don't have any infrastructure to track or enforce
this unfortunately.

-Andi