Re: [PATCH 11/16] net: phy: adin: PHY reset mechanisms
From: Ardelean, Alexandru
Date: Tue Aug 06 2019 - 02:51:10 EST
On Mon, 2019-08-05 at 17:15 +0200, Andrew Lunn wrote:
> [External]
>
> On Mon, Aug 05, 2019 at 07:54:48PM +0300, Alexandru Ardelean wrote:
> > The ADIN PHYs supports 4 types of reset:
> > 1. The standard PHY reset via BMCR_RESET bit in MII_BMCR reg
> > 2. Reset via GPIO
> > 3. Reset via reg GeSftRst (0xff0c) & reload previous pin configs
> > 4. Reset via reg GeSftRst (0xff0c) & request new pin configs
> >
> > Resets 2 & 4 are almost identical, with the exception that the crystal
> > oscillator is available during reset for 2.
> >
> > Resetting via GeSftRst or via GPIO is useful when doing a warm reboot. If
> > doing various settings via phytool or ethtool, the sub-system registers
> > don't reset just via BMCR_RESET.
> >
> > This change implements resetting the entire PHY subsystem during probe.
> > During PHY HW init (phy_hw_init() logic) the PHY core regs will be reset
> > again via BMCR_RESET. This will also need to happen during a PM resume.
>
> phylib already has support for GPIO reset. So if possible, you should
> not repeat that code here.
>
> What is the difference between a GPIO reset, and a GPIO reset followed
> by a subsystem soft reset?
there shouldn't be any difference;
it's just 2 consecutive resets;
i'll take a closer look at phylib's GPIO reset and see
>
> Andrew