On Fri, 2019-08-09 at 10:59 +0200, Christophe Leroy wrote:
Le 09/08/2019 Ã 02:45, Alastair D'Silva a Ãcrit :
From: Alastair D'Silva <alastair@xxxxxxxxxxx>
When calling flush_icache_range with a size >4GB, we were masking
off the upper 32 bits, so we would incorrectly flush a range
smaller
than intended.
This patch replaces the 32 bit shifts with 64 bit ones, so that
the full size is accounted for.
Heads-up for backporters: the old version of flush_dcache_range is
subject to a similar bug (this has since been replaced with a C
implementation).
Can you submit a patch to stable, explaining this ?
This patch was sent to stable too - or did you mean send another patch
for the stable asm version of flush_dcache_range?