[PATCH 05/13] dt-bindings: interrupt-controller: Add Loongson-3 IOINTC
From: Jiaxun Yang
Date: Tue Aug 27 2019 - 05:00:23 EST
Document Loongson-3 I/O Interrupt controller.
Signed-off-by: Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
---
.../loongson,ls3-iointc.yaml | 61 +++++++++++++++++++
1 file changed, 61 insertions(+)
create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,ls3-iointc.yaml
diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,ls3-iointc.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,ls3-iointc.yaml
new file mode 100644
index 000000000000..cc6ac8b2cd7c
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,ls3-iointc.yaml
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/interrupt-controller/loongson,ls3-iointc.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Loongson-3 I/O Interrupt Controller
+
+maintainers:
+ - Jiaxun Yang <jiaxun.yang@xxxxxxxxxxx>
+
+description: |
+ This interrupt controller is found in the Loongson-3 family of chips as the primary
+ package interrupt source which can route interrupt to interrupt line of cores.
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - loongson,ls3-iointc
+
+ reg:
+ maxItems: 1
+
+ 'loongson,map-ip':
+ description:
+ The interrupt line it's going to map to.
+ allOf:
+ - maximum: 5
+ minimum: 0
+
+ 'loongson,map-core':
+ description:
+ The core it's going to map to.
+ allOf:
+ - maximum: 5
+ minimum: 0
+
+ interrupt-controller: true
+
+ '#interrupt-cells':
+ const: 2
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-controller
+ - '#interrupt-cells'
+
+examples:
+ - |
+ iointc: interrupt-controller@3ff01400 {
+ compatible = "loongson,ls3-io-intc";
+ reg = <0x3ff01400 0x60>;
+ interrupts = <2>;
+ loongson,map-ip = <0>;
+ loongson,map-core = <0>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
--
2.22.0