Re: [PATCH v5 1/4] dt-bindings: EDAC: Add Amazon's Annapurna Labs L1 EDAC

[Rob Herring]

On Mon, Aug 26, 2019 at 9:49 AM Hawa, Hanna <hhhawa@xxxxxxxxxx> wrote:
>
>
>
> On 8/21/2019 10:17 PM, Rob Herring wrote:
> > Why is this even in DT? AFAICT, this is all just CortexA57 core features
> > (i.e. nothing Amazon specific). The core type and the ECC capabilities
> > are discoverable.
>
> Added to the DT in order to easily enable/disable the driver.

That alone is not reason enough to put it in DT. From a DT
perspective, I have no idea what the whims of a OS maintainer are
regarding whether they want all this to be 1 driver or 2 drivers.
(IMO, it should be 1 as this is ECC for an A57. For a core and memory
controller, then 2 seems appropriate.)

> You are
> correct that they are CortexA57 core features and nothing Amazon
> specific, but it's IMPLEMENTATION DEFINED, meaning that in different
> cortex revisions (e.g. A57) the register bitmap may change. Because of
> that we added an Amazon compatible which corresponds to the specific
> core we are using.

'IMPLEMENTATION DEFINED' usually means not defined by the
architecture. This doesn't seem like something that's going to change
with A57 revisions. Plus, the A57 is pretty old now, so we know what's
out there already. In any case, the revision is discoverable too, so
we could deal with changes between revisions in any case.

Rob