Re: [PATCH v2 0/5] 0/6] arm64: meson-sm1: add support for DVFS

From: Jerome Brunet
Date: Wed Aug 28 2019 - 04:11:23 EST


On Tue 27 Aug 2019 at 15:35, Kevin Hilman <khilman@xxxxxxxxxxxx> wrote:

> Kevin Hilman <khilman@xxxxxxxxxxxx> writes:
>
>> Jerome Brunet <jbrunet@xxxxxxxxxxxx> writes:
>>
>>> On Mon 26 Aug 2019 at 09:25, Neil Armstrong <narmstrong@xxxxxxxxxxxx> wrote:
>>>
>>>> Following DVFS support for the Amlogic G12A and G12B SoCs, this serie
>>>> enables DVFS on the SM1 SoC for the SEI610 board.
>>>>
>>>> The SM1 Clock structure is slightly different because of the Cortex-A55
>>>> core used, having the capability for each core of a same cluster to run
>>>> at a different frequency thanks to the newly used DynamIQ Shared Unit.
>>>>
>>>> This is why SM1 has a CPU clock tree for each core and for DynamIQ Shared Unit,
>>>> with a bypass mux to use the CPU0 instead of the dedicated trees.
>>>>
>>>> The DSU uses a new GP1 PLL as default clock, thus GP1 is added as read-only.
>>>>
>>>> The SM1 OPPs has been taken from the Amlogic Vendor tree, and unlike
>>>> G12A only a single version of the SoC is available.
>>>>
>>>> Dependencies:
>>>> - patch 6 is based on the "arm64: meson: add support for SM1 Power Domains" serie,
>>>> but is not a strong dependency, it will work without
>>>>
>>>> Changes since v1:
>>>> - exposed GP1, DSU and CPU 1,2,3 clock in patch 1
>>>>
>>>> Neil Armstrong (5):
>>>> dt-bindings: clk: meson: add sm1 periph clock controller bindings
>>>> clk: meson: g12a: add support for SM1 GP1 PLL
>>>> clk: meson: g12a: add support for SM1 DynamIQ Shared Unit clock
>>>> clk: meson: g12a: add support for SM1 CPU 1, 2 & 3 clocks
>>>> arm64: dts: meson-sm1-sei610: enable DVFS
>>>>
>>>> .../bindings/clock/amlogic,gxbb-clkc.txt | 1 +
>>>> .../boot/dts/amlogic/meson-sm1-sei610.dts | 59 +-
>>>> arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 69 +++
>>>> drivers/clk/meson/g12a.c | 544 ++++++++++++++++++
>>>> drivers/clk/meson/g12a.h | 24 +-
>>>> include/dt-bindings/clock/g12a-clkc.h | 5 +
>>>> 6 files changed, 697 insertions(+), 5 deletions(-)
>>>
>>> Applied 1 to 4
>>
>> Will there be a stable tag I can use for that so I can apply patch 5?
>
> Ah, I should've finished reading the list before asking. I now see your
> clock PR. I'll use this tag[1] unless there's a different one I should
> use.

I just pushed clk-meson-dt-v5.4-3 for you, with dt changes only.

>
> Kevin
>
> [1] git://github.com/BayLibre/clk-meson.git tags/clk-meson-v5.4-2