Hi everyone,
+/*
+ * If 'process_call' is true, then this is a multi-msg transfer that requires
+ * a repeated start between the messages.
+ * More specifically, it must be a write (reg) followed by a read (data).
+ * The i2c quirks are set to enforce this rule.
+ */
With all the limitations in place, I wonder if it might be easier to
implement an smbus_xfer callback instead? What is left that makes this
controller more than SMBus and real I2C?
+ /* Process the read message if this is process call */
Also, the term "process call" here seriously sounds like SMBus.
+ addr = msg->addr << 1 | 1;
addr = i2c_8bit_addr_from_msg(msg);
+ u32 protocol;
Hmm, another SMBus terminology.
+ if (num > 2) {
+ dev_err(iproc_i2c->device,
+ "Only support up to 2 messages. Current msg count %d\n",
+ num);
+ return -EOPNOTSUPP;
+ }
With your quirks flags set, the core checks it for you.
Kind regards,
Wolfram