Re: [PATCH V4 07/14] perf/x86/intel: Support hardware TopDown metrics

From: Peter Zijlstra
Date: Mon Sep 30 2019 - 09:06:33 EST


On Mon, Sep 16, 2019 at 06:41:21AM -0700, kan.liang@xxxxxxxxxxxxxxx wrote:
> Reset
> ======
>
> Both PERF_METRICS and fixed counter 3 are required to start from zero.

explain *why*, also in the comments.

> However, current perf has -max_period as default initial value.
> The patch force initial value as 0 for topdown and slots event counting.
>
> Additionally, for certain scenarios that involve counting metrics at
> high rates, SW is required to periodically clear both MSRs in order to
> maintain accurate measurements. In this patch, both PERF_METRICS and
> Fixed counter 3 are reset for each read.

That forgoes all the good details again :/


> Originally-by: Andi Kleen <ak@xxxxxxxxxxxxxxx>

This is of dubius value here and in that other patch. In that other
patch I've written more lines than Andi has and here you have pretty
much rewritten everything since v1 or so.

> +static bool is_first_topdown_event_in_group(struct perf_event *event)
> +{
> + struct perf_event *first = NULL;
> +
> + if (is_topdown_event(event->group_leader))
> + first = event->group_leader;
> + else {
> + for_each_sibling_event(first, event->group_leader)
> + if (is_topdown_event(first))
> + break;
> + }
> +
> + if (event == first)
> + return true;
> +
> + return false;
> +}

> +static u64 icl_update_topdown_event(struct perf_event *event)
> +{
> + struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
> + struct perf_event *other;
> + u64 slots, metrics;
> + int idx;
> +
> + /*
> + * Only need to update all events for the first
> + * slots/metrics event in a group
> + */
> + if (event && !is_first_topdown_event_in_group(event))
> + return 0;

This is pretty crap and approaches O(n^2); let me think if there's
anything saner to do here.