[PATCH v2 00/36] MIPS: barriers & atomics cleanups

[Paul Burton]

This series consists of a bunch of cleanups to the way we handle memory
barriers (though no changes to the sync instructions we use to implement
them) & atomic memory accesses. One major goal was to ensure the
Loongson3 LL/SC errata workarounds are applied in a safe manner from
within inline-asm & that we can automatically verify the resulting
kernel binary looks reasonable. Many patches are cleanups found along
the way.

Applies atop v5.4-rc1.

Changes in v2:
- Keep our fls/ffs implementations. Turns out GCC's builtins call
  intrinsics in some configurations, and if we'd need to go implement
  those then using the generic fls/ffs doesn't seem like such a win.
- De-string __WEAK_LLSC_MB to allow use with __SYNC_ELSE().
- Only try to build the loongson3-llsc-check tool from
  arch/mips/Makefile when CONFIG_CPU_LOONGSON3_WORKAROUNDS is enabled.

Paul Burton (36):
  MIPS: Unify sc beqz definition
  MIPS: Use compact branch for LL/SC loops on MIPSr6+
  MIPS: barrier: Add __SYNC() infrastructure
  MIPS: barrier: Clean up rmb() & wmb() definitions
  MIPS: barrier: Clean up __smp_mb() definition
  MIPS: barrier: Remove fast_mb() Octeon #ifdef'ery
  MIPS: barrier: Clean up __sync() definition
  MIPS: barrier: Clean up sync_ginv()
  MIPS: atomic: Fix whitespace in ATOMIC_OP macros
  MIPS: atomic: Handle !kernel_uses_llsc first
  MIPS: atomic: Use one macro to generate 32b & 64b functions
  MIPS: atomic: Emit Loongson3 sync workarounds within asm
  MIPS: atomic: Use _atomic barriers in atomic_sub_if_positive()
  MIPS: atomic: Unify 32b & 64b sub_if_positive
  MIPS: atomic: Deduplicate 32b & 64b read, set, xchg, cmpxchg
  MIPS: bitops: Handle !kernel_uses_llsc first
  MIPS: bitops: Only use ins for bit 16 or higher
  MIPS: bitops: Use MIPS_ISA_REV, not #ifdefs
  MIPS: bitops: ins start position is always an immediate
  MIPS: bitops: Implement test_and_set_bit() in terms of _lock variant
  MIPS: bitops: Allow immediates in test_and_{set,clear,change}_bit
  MIPS: bitops: Use the BIT() macro
  MIPS: bitops: Avoid redundant zero-comparison for non-LLSC
  MIPS: bitops: Abstract LL/SC loops
  MIPS: bitops: Use BIT_WORD() & BITS_PER_LONG
  MIPS: bitops: Emit Loongson3 sync workarounds within asm
  MIPS: bitops: Use smp_mb__before_atomic in test_* ops
  MIPS: cmpxchg: Emit Loongson3 sync workarounds within asm
  MIPS: cmpxchg: Omit redundant barriers for Loongson3
  MIPS: futex: Emit Loongson3 sync workarounds within asm
  MIPS: syscall: Emit Loongson3 sync workarounds within asm
  MIPS: barrier: Remove loongson_llsc_mb()
  MIPS: barrier: Make __smp_mb__before_atomic() a no-op for Loongson3
  MIPS: genex: Add Loongson3 LL/SC workaround to ejtag_debug_handler
  MIPS: genex: Don't reload address unnecessarily
  MIPS: Check Loongson3 LL/SC errata workaround correctness

 arch/mips/Makefile                     |   3 +
 arch/mips/Makefile.postlink            |  10 +-
 arch/mips/include/asm/atomic.h         | 571 +++++++++----------------
 arch/mips/include/asm/barrier.h        | 228 ++--------
 arch/mips/include/asm/bitops.h         | 443 ++++++-------------
 arch/mips/include/asm/cmpxchg.h        |  59 +--
 arch/mips/include/asm/futex.h          |  15 +-
 arch/mips/include/asm/llsc.h           |  19 +-
 arch/mips/include/asm/sync.h           | 207 +++++++++
 arch/mips/kernel/genex.S               |   6 +-
 arch/mips/kernel/pm-cps.c              |  20 +-
 arch/mips/kernel/syscall.c             |   3 +-
 arch/mips/lib/bitops.c                 |  57 +--
 arch/mips/loongson64/Platform          |   2 +-
 arch/mips/tools/.gitignore             |   1 +
 arch/mips/tools/Makefile               |   5 +
 arch/mips/tools/loongson3-llsc-check.c | 307 +++++++++++++
 17 files changed, 981 insertions(+), 975 deletions(-)
 create mode 100644 arch/mips/include/asm/sync.h
 create mode 100644 arch/mips/tools/loongson3-llsc-check.c

-- 
2.23.0