Re: [PATCH 2/3] watchdog: sam9x60_wdt: introduce sam9x60 watchdog timer driver

From: kbuild test robot
Date: Wed Oct 02 2019 - 09:39:03 EST

Hi,

I love your patch! Perhaps something to improve:

[auto build test WARNING on linus/master]
[cannot apply to v5.4-rc1 next-20191002]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]

url: https://github.com/0day-ci/linux/commits/Eugen-Hristev-microchip-com/dt-bindings-watchdog-sam9x60_wdt-add-bindings/20191002-200155
config: ia64-allmodconfig (attached as .config)
compiler: ia64-linux-gcc (GCC) 7.4.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.4.0 make.cross ARCH=ia64

If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@xxxxxxxxx>

All warnings (new ones prefixed by >>):

drivers//watchdog/sam9x60_wdt.c: In function 'sam9x60_wdt_ping':
>> drivers//watchdog/sam9x60_wdt.c:23:24: warning: large integer implicitly truncated to unsigned type [-Woverflow]
#define AT91_WDT_KEY (0xa5 << 24) /* KEY Password */
^
>> drivers//watchdog/sam9x60_wdt.c:126:30: note: in expansion of macro 'AT91_WDT_KEY'
wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
^~~~~~~~~~~~

vim +/AT91_WDT_KEY +126 drivers//watchdog/sam9x60_wdt.c

20
21 #define AT91_WDT_CR 0x00 /* Watchdog Control Register */
22 #define AT91_WDT_WDRSTT BIT(0) /* Restart */
> 23 #define AT91_WDT_KEY (0xa5 << 24) /* KEY Password */
24
25 #define AT91_WDT_MR 0x04 /* Watchdog Mode Register */
26 #define AT91_WDT_PERIODRST BIT(4) /* Period Reset */
27 #define AT91_WDT_RPTHRST BIT(5) /* Minimum Restart Period */
28 #define AT91_WDT_WDDIS BIT(12) /* Disable */
29 #define AT91_WDT_WDDBGHLT BIT(28) /* Debug Halt */
30 #define AT91_WDT_WDIDLEHLT BIT(29) /* Idle Halt */
31
32 #define AT91_WDT_VR 0x08 /* Watchdog Timer Value Register */
33
34 #define AT91_WDT_WLR 0x0c
35 #define AT91_WDT_COUNTER (0xfff << 0) /* Watchdog Period Value */
36 #define AT91_WDT_SET_COUNTER(x) ((x) & AT91_WDT_COUNTER)
37
38 #define AT91_WDT_IER 0x14 /* Interrupt Enable Register */
39 #define AT91_WDT_PERINT BIT(0) /* Period Interrupt Enable */
40 #define AT91_WDT_IDR 0x18 /* Interrupt Disable Register */
41 #define AT91_WDT_ISR 0x1c /* Interrupt Status Register */
42
43 /* minimum and maximum watchdog timeout, in seconds */
44 #define MIN_WDT_TIMEOUT 1
45 #define MAX_WDT_TIMEOUT 16
46 #define WDT_DEFAULT_TIMEOUT MAX_WDT_TIMEOUT
47
48 #define WDT_SEC2TICKS(s) ((s) ? (((s) << 8) - 1) : 0)
49
50 struct sam9x60_wdt {
51 struct watchdog_device wdd;
52 void __iomem *reg_base;
53 u32 mr;
54 u32 ir;
55 unsigned long last_ping;
56 };
57
58 static int wdt_timeout;
59 static bool nowayout = WATCHDOG_NOWAYOUT;
60
61 module_param(wdt_timeout, int, 0);
62 MODULE_PARM_DESC(wdt_timeout,
63 "Watchdog timeout in seconds. (default = "
64 __MODULE_STRING(WDT_DEFAULT_TIMEOUT) ")");
65
66 module_param(nowayout, bool, 0);
67 MODULE_PARM_DESC(nowayout,
68 "Watchdog cannot be stopped once started (default="
69 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
70
71 #define wdt_enabled (!(wdt->mr & AT91_WDT_WDDIS))
72
73 #define wdt_read(wdt, field) \
74 readl_relaxed((wdt)->reg_base + (field))
75
76 /* 4 slow clock periods is 4/32768 = 122.07us*/
77 #define WDT_DELAY usecs_to_jiffies(123)
78
79 static void wdt_write(struct sam9x60_wdt *wdt, u32 field, u32 val)
80 {
81 /*
82 * WDT_CR and WDT_MR must not be modified within three slow clock
83 * periods following a restart of the watchdog performed by a write
84 * access in WDT_CR.
85 */
86 while (time_before(jiffies, wdt->last_ping + WDT_DELAY))
87 usleep_range(30, 125);
88 writel_relaxed(val, wdt->reg_base + field);
89 wdt->last_ping = jiffies;
90 }
91
92 static void wdt_write_nosleep(struct sam9x60_wdt *wdt, u32 field, u32 val)
93 {
94 if (time_before(jiffies, wdt->last_ping + WDT_DELAY))
95 usleep_range(123, 250);
96 writel_relaxed(val, wdt->reg_base + field);
97 wdt->last_ping = jiffies;
98 }
99
100 static int sam9x60_wdt_start(struct watchdog_device *wdd)
101 {
102 struct sam9x60_wdt *wdt = watchdog_get_drvdata(wdd);
103
104 wdt->mr &= ~AT91_WDT_WDDIS;
105 wdt_write(wdt, AT91_WDT_MR, wdt->mr);
106 wdt_write_nosleep(wdt, AT91_WDT_IER, wdt->ir);
107
108 return 0;
109 }
110
111 static int sam9x60_wdt_stop(struct watchdog_device *wdd)
112 {
113 struct sam9x60_wdt *wdt = watchdog_get_drvdata(wdd);
114
115 wdt->mr |= AT91_WDT_WDDIS;
116 wdt_write(wdt, AT91_WDT_MR, wdt->mr);
117 wdt_write_nosleep(wdt, AT91_WDT_IDR, wdt->ir);
118
119 return 0;
120 }
121
122 static int sam9x60_wdt_ping(struct watchdog_device *wdd)
123 {
124 struct sam9x60_wdt *wdt = watchdog_get_drvdata(wdd);
125
> 126 wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
127
128 return 0;
129 }
130

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