Hi Rob,Shall I proceed with above compatibles if you agree upon. Thanks!
Thank you for the review comments.
On 17/9/2019 10:23 PM, Rob Herring wrote:
On Wed, Sep 04, 2019 at 01:53:43PM +0800, Ramuthevar,Vadivel MuruganX wrote:From: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@xxxxxxxxxxxxxxx>This, plus...
Add a YAML schema to use the host controller driver with the
eMMC PHY on Intel's Lightning Mountain SoC.
Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@xxxxxxxxxxxxxxx>
---
changes in v5:
ÂÂ - earlier Review-by tag given by Rob
ÂÂ - rework done with syscon parent node.
changes in v4:
ÂÂ - As per Rob's review: validate 5.2 and 5.3
ÂÂ - drop unrelated items.
changes in v3:
ÂÂ - resolve 'make dt_binding_check' warnings
changes in v2:
ÂÂ As per Rob Herring review comments, the following updates
 - change GPL-2.0 -> (GPL-2.0-only OR BSD-2-Clause)
 - filename is the compatible string plus .yaml
 - LGM: Lightning Mountain
 - update maintainer
 - add intel,syscon under property list
 - keep one example instead of two
---
 .../bindings/phy/intel,lgm-emmc-phy.yaml | 69 ++++++++++++++++++++++
 1 file changed, 69 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml
diff --git a/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml
new file mode 100644
index 000000000000..8f6ac8b3da42
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml
@@ -0,0 +1,69 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/intel,lgm-emmc-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Intel Lightning Mountain(LGM) eMMC PHY Device Tree Bindings
+
+maintainers:
+Â - Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@xxxxxxxxxxxxxxx>
+
+description: Bindings for eMMC PHY on Intel's Lightning Mountain SoC, syscon
+Â node is used to reference the base address of eMMC phy registers.
+
+select:
+Â properties:
+ÂÂÂ compatible:
+ÂÂÂÂÂ contains:
+ÂÂÂÂÂÂÂ const: intel,lgm-syscon
you mean, need to add two compatible here-itself look like below
const: intel,lgm-syscon
const: intel,lgm-emmc-phy
Is it right?
when I do "make dt_binding_check" didn't throw an error, let me double confirm once clarified first comment.+...this should not pass validation as they contradict each other.
+ÂÂÂ reg:
+ÂÂÂÂÂ maxItems: 1
+
+Â required:
+ÂÂÂ - compatible
+ÂÂÂ - reg
+
+properties:
+Â "#phy-cells":
+ÂÂÂ const: 0
+
+Â compatible:
+ÂÂÂ contains:
+ÂÂÂÂÂ const: intel,lgm-emmc-phy
Agree!, I will add it.+I'm still waiting for a complete description of what all is in this
+Â reg:
+ÂÂÂ maxItems: 1
+
+Â clocks:
+ÂÂÂ maxItems: 1
+
+Â clock-names:
+ÂÂÂ maxItems: 1
+
+required:
+Â - "#phy-cells"
+Â - compatible
+Â - reg
+Â - clocks
+Â - clock-names
+
+examples:
+Â - |
+ÂÂÂ sysconf: chiptop@e0200000 {
+ÂÂÂÂÂ compatible = "intel,lgm-syscon";
+ÂÂÂÂÂ reg = <0xe0200000 0x100>;
block.
Agreed, will fix it.+Looks contiguous and can be a single entry:
+ÂÂÂÂÂ emmc-phy: emmc-phy {
+ÂÂÂÂÂÂÂ compatible = "intel,lgm-emmc-phy";
+ÂÂÂÂÂÂÂ reg = <0x00a8 0x4>,
+ÂÂÂÂÂÂÂÂÂÂÂÂÂ <0x00ac 0x4>,
+ÂÂÂÂÂÂÂÂÂÂÂÂÂ <0x00b0 0x4>,
+ÂÂÂÂÂÂÂÂÂÂÂÂÂ <0x00b4 0x4>;
<0xa8 0x10>
Best Regards
Vadivel
+ÂÂÂÂÂÂÂ clocks = <&emmc>;
+ÂÂÂÂÂÂÂ clock-names = "emmcclk";
+ÂÂÂÂÂÂÂ #phy-cells = <0>;
+ÂÂÂÂÂ };
+ÂÂÂ };
+...
--
2.11.0