Re: [PATCH v3 2/3] dt-bindings: clk: qcom: Add YAML schemas for the GCC clock bindings

From: Taniya Das
Date: Mon Oct 14 2019 - 06:18:03 EST


Hi Stephen,

Thanks for your review.

On 9/19/2019 2:56 AM, Stephen Boyd wrote:
Quoting Taniya Das (2019-09-18 02:50:17)
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc.yaml
new file mode 100644
index 000000000000..056a7977c458
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc.yaml
@@ -0,0 +1,157 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/qcom,gcc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Global Clock & Reset Controller Binding
+
+maintainers:
+ - Stephen Boyd <sboyd@xxxxxxxxxx>

Why am I the maintainer? Shouldn't this be you?

+
+properties:
+ "#clock-cells":
+ const: 1
+
+ "#reset-cells":
+ const: 1
+
+ reg:
+ maxItems: 1
+
+ compatible :
+ enum:
+ - qcom,gcc-apq8064
+ - qcom,gcc-apq8084
+ - qcom,gcc-ipq8064
+ - qcom,gcc-ipq4019
+ - qcom,gcc-ipq8074
+ - qcom,gcc-msm8660
+ - qcom,gcc-msm8916
+ - qcom,gcc-msm8960
+ - qcom,gcc-msm8974
+ - qcom,gcc-msm8974pro
+ - qcom,gcc-msm8974pro-ac
+ - qcom,gcc-msm8994
+ - qcom,gcc-msm8996
+ - qcom,gcc-msm8998
+ - qcom,gcc-mdm9615
+ - qcom,gcc-qcs404
+ - qcom,gcc-sdm630
+ - qcom,gcc-sdm660
+ - qcom,gcc-sdm845
+ - qcom,gcc-sm8150
+ - qcom,gcc-sc7180
+
+ clocks:
+ minItems: 1
+ maxItems: 3
+ items:
+ - description: Board XO source
+ - description: Board active XO source
+ - description: Sleep clock source(optional)

Why is sleep clk optional?


Will remove optional.

+
+ clock-names:
+ minItems: 1
+ maxItems: 3
+ items:
+ - const: bi_tcxo
+ - const: bi_tcxo_ao
+ - const: sleep_clk
+
+ nvmem-cells:
+ minItems: 1
+ maxItems: 2
+ description:
+ Qualcomm TSENS (thermal sensor device) on some devices can

Can this be restricted to certain compatible strings where this is the
case? I'd like to be able to confirm that the compatibles that expect to
see the nvmem actually have it.


I will add this in the next patch.

+ be part of GCC and hence the TSENS properties can also be part
+ of the GCC/clock-controller node.
+ For more details on the TSENS properties please refer
+ Documentation/devicetree/bindings/thermal/qcom-tsens.txt
+
+ nvmem-cell-names:
+ minItems: 1
+ maxItems: 2
+ description:
+ Names for each nvmem-cells specified.
+ items:
+ - const: calib
+ - const: calib_backup
+
+ "#thermal-sensor-cells":
+ const: 1

Same for this one.

+
+ "#power-domain-cells":
+ const: 1
+
+ protected-clocks:
+ description:
+ Protected clock specifier list as per common clock binding
+
+required:
+ - "#clock-cells"
+ - "#reset-cells"
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+
+examples:

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