Re: [PATCH 3/3] rtc: ds1685: add indirect access method and remove plat_read/plat_write

[Thomas Bogendoerfer]

On Sat, 12 Oct 2019 19:22:01 -0400
Joshua Kinard <kumba@xxxxxxxxxx> wrote:

> On 10/11/2019 11:05, Thomas Bogendoerfer wrote:
> > +static void
> > +ds1685_indir_write(struct ds1685_priv *rtc, int reg, u8 value)
> > +{
> > +	writeb(reg, rtc->regs);
> > +	writeb(value, rtc->data);
> > +}
> 
> IP30 applied a mask of 0x7f on the 'reg' parameter on both of its
> read/write functions, which was from Stan's original code.  Is this mask
> not needed any more with the other changes you made to the IP30 code? 

reg is always < 0x80, so I didn't see a point in masking it.

> > +	switch (pdata->access_type) {
> > +	case ds1685_reg_direct:
> > +		rtc->regs = devm_platform_ioremap_resource(pdev, 0);
> > +		if (IS_ERR(rtc->regs))
> > +			return PTR_ERR(rtc->regs);
> > +		rtc->read = ds1685_read;
> > +		rtc->write = ds1685_write;
> > +		break;
> > +	case ds1685_reg_indirect:
> >  		rtc->regs = devm_platform_ioremap_resource(pdev, 0);
> >  		if (IS_ERR(rtc->regs))
> >  			return PTR_ERR(rtc->regs);
> > +		rtc->data = devm_platform_ioremap_resource(pdev, 1);
> > +		if (IS_ERR(rtc->data))
> > +			return PTR_ERR(rtc->data);
> > +		rtc->read = ds1685_indir_read;
> > +		rtc->write = ds1685_indir_write;
> > +		break;
> >  	}
> 
> I believe there should be a default case in the switch statement to catch
> and return -ENXIO so that we don't wind up with rtc->{read,write} being
> NULL.

access_type is an enum and all possible values are covered with cases.
But I'll add a safe guart to check that read/write is set to cover garbled
platform_data. If you want to keep plat_read/plat_write I could add an
additional access_type (which could also be done later, when there is a
real use case).

> I also think the "indir" name isn't really descriptive of why IP32 and
> IP30 effectively have different read/write mechanisms.

IP32 accesses register directly and IP30 indirectly via an address register.
I'll use indirect in function name and some comment to explain.

> Might want to add
> some comments to explain that IP32 uses MMIO and can just directly
> read/write the registers, while IP30 uses PIO and has to go the route of

what's PIO here for you ? RTC address and data register are mapped MMIO
as part of the IOC3 register bar on IP30.

Thomas.

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