Re: [PATCH v5 0/4] Fix MTRR bug for intel-lpss-pci

[Lee Jones]

On Thu, 17 Oct 2019, Andy Shevchenko wrote:

> On Thu, Oct 17, 2019 at 08:31:16AM +0100, Lee Jones wrote:
> > On Thu, 17 Oct 2019, Andy Shevchenko wrote:
> > > On Wed, Oct 16, 2019 at 03:06:25PM -0600, Tuowen Zhao wrote:
> > > > Some BIOS erroneously specifies write-combining BAR for intel-lpss-pci
> > > > in MTRR. This will cause the system to hang during boot. If possible,
> > > > this bug could be corrected with a firmware update.
> > > > 
> > > > Previous version: https://lkml.org/lkml/2019/10/14/575
> > > > 
> > > > Changes from previous version:
> > > > 
> > > >  * implement ioremap_uc for sparc64
> > > >  * split docs changes to not CC stable (doc location moved since 5.3)
> > > > 
> > > 
> > > It forgot to explicitly mention through which tree is supposed to go.
> > > I think it's MFD one, correct?
> > 
> > To be fair, that's not really up to the submitter to decide.
> 
> Submitter still can share their view, no?

Preferences can be voiced, if held, and will always be taken into
consideration.  The final decision will always be made by the people
managing the trees.

The comment above implies a requirement to specify which tree is
preferred, which is not the case.  In almost all cases, it's best not
to specify.

-- 
Lee Jones [æçæ]
Linaro Services Technical Lead
Linaro.org â Open source software for ARM SoCs
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