Re: [PATCH 05/15] riscv: poison SBI calls for M-mode

From: Anup Patel
Date: Fri Oct 18 2019 - 01:20:21 EST


On Thu, Oct 17, 2019 at 11:08 PM Christoph Hellwig <hch@xxxxxx> wrote:
>
> There is no SBI when we run in M-mode, so fail the compile for any code
> trying to use SBI calls.
>
> Signed-off-by: Christoph Hellwig <hch@xxxxxx>
> ---
> arch/riscv/include/asm/sbi.h | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h
> index 21134b3ef404..b167af3e7470 100644
> --- a/arch/riscv/include/asm/sbi.h
> +++ b/arch/riscv/include/asm/sbi.h
> @@ -8,6 +8,7 @@
>
> #include <linux/types.h>
>
> +#ifdef CONFIG_RISCV_SBI
> #define SBI_SET_TIMER 0
> #define SBI_CONSOLE_PUTCHAR 1
> #define SBI_CONSOLE_GETCHAR 2
> @@ -93,5 +94,5 @@ static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
> {
> SBI_CALL_4(SBI_REMOTE_SFENCE_VMA_ASID, hart_mask, start, size, asid);
> }
> -
> -#endif
> +#endif /* CONFIG_RISCV_SBI */
> +#endif /* _ASM_RISCV_SBI_H */
> --
> 2.20.1
>
>
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LGTM.

Reviewed-by: Anup Patel <anup@xxxxxxxxxxxxxx>

Regards,
Anup