Re: [PATCH 10/15] riscv: read the hart ID from mhartid on boot
From: Anup Patel
Date: Fri Oct 18 2019 - 01:29:22 EST
On Thu, Oct 17, 2019 at 11:08 PM Christoph Hellwig <hch@xxxxxx> wrote:
>
> From: Damien Le Moal <Damien.LeMoal@xxxxxxx>
>
> When in M-Mode, we can use the mhartid CSR to get the ID of the running
> HART. Doing so, direct M-Mode boot without firmware is possible.
>
> Signed-off-by: Damien Le Moal <damien.lemoal@xxxxxxx>
> Signed-off-by: Christoph Hellwig <hch@xxxxxx>
> Reviewed-by: Atish Patra <atish.patra@xxxxxxx>
> ---
> arch/riscv/include/asm/csr.h | 1 +
> arch/riscv/kernel/head.S | 8 ++++++++
> 2 files changed, 9 insertions(+)
>
> diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
> index 0dae5c361f29..d0b5113e1a54 100644
> --- a/arch/riscv/include/asm/csr.h
> +++ b/arch/riscv/include/asm/csr.h
> @@ -81,6 +81,7 @@
> #define SIE_SEIE (_AC(0x1, UL) << IRQ_S_EXT)
>
> /* symbolic CSR names: */
> +#define CSR_MHARTID 0xf14
> #define CSR_MSTATUS 0x300
> #define CSR_MIE 0x304
> #define CSR_MTVEC 0x305
> diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
> index 679e63d29edb..583784cb3a32 100644
> --- a/arch/riscv/kernel/head.S
> +++ b/arch/riscv/kernel/head.S
> @@ -50,6 +50,14 @@ _start_kernel:
> csrw CSR_XIE, zero
> csrw CSR_XIP, zero
>
> +#ifdef CONFIG_RISCV_M_MODE
> + /*
> + * The hartid in a0 is expected later on, and we have no firmware
> + * to hand it to us.
> + */
> + csrr a0, CSR_MHARTID
> +#endif
> +
> /* Load the global pointer */
> .option push
> .option norelax
> --
> 2.20.1
>
>
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LGTM.
Reviewed-by: Anup Patel <anup@xxxxxxxxxxxxxx>
Regards,
Anup