Re: [PATCH 11/15] riscv: use the correct interrupt levels for M-mode

[Anup Patel]

On Thu, Oct 17, 2019 at 11:08 PM Christoph Hellwig <hch@xxxxxx> wrote:
>
> The numerical levels for External/Timer/Software interrupts differ
> between S-mode and M-mode.
>
> Signed-off-by: Christoph Hellwig <hch@xxxxxx>
> ---
>  arch/riscv/kernel/irq.c | 12 +++++++++---
>  1 file changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/arch/riscv/kernel/irq.c b/arch/riscv/kernel/irq.c
> index 804ff70bb853..dbd1fd7c22e4 100644
> --- a/arch/riscv/kernel/irq.c
> +++ b/arch/riscv/kernel/irq.c
> @@ -14,9 +14,15 @@
>  /*
>   * Possible interrupt causes:
>   */
> -#define INTERRUPT_CAUSE_SOFTWARE       IRQ_S_SOFT
> -#define INTERRUPT_CAUSE_TIMER          IRQ_S_TIMER
> -#define INTERRUPT_CAUSE_EXTERNAL       IRQ_S_EXT
> +#ifdef CONFIG_RISCV_M_MODE
> +# define INTERRUPT_CAUSE_SOFTWARE      IRQ_M_SOFT
> +# define INTERRUPT_CAUSE_TIMER         IRQ_M_TIMER
> +# define INTERRUPT_CAUSE_EXTERNAL      IRQ_M_EXT
> +#else
> +# define INTERRUPT_CAUSE_SOFTWARE      IRQ_S_SOFT
> +# define INTERRUPT_CAUSE_TIMER         IRQ_S_TIMER
> +# define INTERRUPT_CAUSE_EXTERNAL      IRQ_S_EXT
> +#endif /* CONFIG_RISCV_M_MODE */
>
>  int arch_show_interrupts(struct seq_file *p, int prec)
>  {
> --
> 2.20.1
>

LGTM.

Reviewed-by: Anup Patel <anup@xxxxxxxxxxxxxx>

Regards,
Anup