Re: Relax CPU features sanity checking on heterogeneous architectures

From: Marc Zyngier
Date: Fri Oct 18 2019 - 12:40:42 EST


On Fri, 18 Oct 2019 15:33:29 +0100,
Stephen Boyd <swboyd@xxxxxxxxxxxx> wrote:
>
> Quoting Marc Zyngier (2019-10-18 00:20:56)
> >
> > If this SoC is anythinig like SM8150, 32bit guests will be hit and
> > miss,
> > depending on the CPU your guest runs on, or is migrated to. We need to
> > either drop capabilities from the 32bit-capable CPU, or prevent the
> > non-32bit capable CPU from booting if a 32bit guest has been started.
> >
> > You just have to hope that the kernel is entered at EL2, and that QC's
> > "value add" has been moved somewhere else...
> >
>
> Ok that's good.

I need a new signature.

M.

--
Jazz is not dead, it just smells funny.